Skip to main content

Retention Register Design

  • Chapter
Low Power Methodology Manual
  • 3907 Accesses

For those designs that require fast resumption of operation after wakeup, it is necessary to save the current state of a design before going into sleep mode and to restore the state at wakeup. In this chapter, we describe on-chip retention methods, including retention registers and retention techniques for memory.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

eBook
USD 16.99
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 139.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info
Hardcover Book
USD 199.99
Price excludes VAT (USA)
  • Durable hardcover edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

Rights and permissions

Reprints and permissions

Copyright information

© 2007 Synopsys, Inc. & ARM Limited

About this chapter

Cite this chapter

(2007). Retention Register Design. In: Low Power Methodology Manual. Springer, Boston, MA. https://doi.org/10.1007/978-0-387-71819-4_13

Download citation

  • DOI: https://doi.org/10.1007/978-0-387-71819-4_13

  • Publisher Name: Springer, Boston, MA

  • Print ISBN: 978-0-387-71818-7

  • Online ISBN: 978-0-387-71819-4

  • eBook Packages: EngineeringEngineering (R0)

Publish with us

Policies and ethics