Retention Register Design

For those designs that require fast resumption of operation after wakeup, it is necessary to save the current state of a design before going into sleep mode and to restore the state at wakeup. In this chapter, we describe on-chip retention methods, including retention registers and retention techniques for memory.


Sleep Mode NMOS Transistor SRAM Cell Clock Phase Source Bias 
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© Synopsys, Inc. & ARM Limited 2007

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