Optimizing Power @ Design Time – Circuit-Level Techniques

  • Jan Rabaey
Part of the Integrated Circuits and Systems book series (ICIR)


Threshold Voltage Supply Voltage Circuit Topology Transistor Size Gate Sizing 
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Copyright information

© Springer Science+Business Media, LLC 2009

Authors and Affiliations

  • Jan Rabaey
    • 1
  1. 1.University of CaliforniaBerkeleyUSA

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