Clock Skew Scheduling in Rotary Clocking Technology
Development of a low-jitter, low-skew (or controllable skew for clock skew scheduling) clocking technology that has low power dissipation is one of the major research topics in the development of next-generation synchronous integrated systems. Among the proposed clocking technologies are wireless [136, 137, 138] and transmission line-based [116, 139, 140, 141, 142, 143, 144, 145, 146, 147, 148] approaches. These technologies must be supported by specific design flows and CAD suites in order to be viable in semiconductor implementation. In this chapter, the adaptability of the majority of the nonzero clock circuit skew design and analysis methods presented earlier in this monograph to the physical design flow of circuits synchronized by a transmission line-based clocking technology is described. The particular transmission line-based technology of interest, the rotary clocking technology, is described in detail.
Three main types of resonant clocking technologies are described in Section 10.1. In particular, the operation of resonant rotary clocking technology is summarized in Section 10.1.1 and the timing of circuits synchronized with the resonant rotary clocking technology is discussed in Section 10.1.2. The physical design flow proposed for integrated circuits synchronized with the rotary clocking technology, that does require non-zero clock skew operation and scheduling, is presented in Section 10.2. A heuristic methodology for the parallelization of clock skew scheduling is presented in Section 10.3. The chapter is summarized in Section 10.4.
KeywordsClock Signal Physical Design Boundary Vertex Clock Period Clock Phase
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