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Evaluate-Update Channels

SC_SIGNALS

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Abstract

The preceding chapter considered high-level synchronization mechanisms. This chapter delves into electronic hardware1.

Electronic signals behave in a manner approaching instantaneous activity. Generally, electronic signals have a single source (producer), but multiple sinks (consumer). It is quite important that all sinks “see” a signal update at the same time.

The easiest way to understand this concept is to consider the common hardware shift register. This model has a number of registers or memory elements as indicated in the diagram (Fig. 9.1) below.

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Notes

  1. 1.

    It is unclear whether the concepts discussed here have any application outside of electrical signals.

  2. 2.

    This usage may surprise non-HDL experienced folks. HDL-experienced users should understand the VHDL or Verilog analogy.

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Black, D.C., Donovan, J., Bunton, B., Keist, A. (2010). Evaluate-Update Channels. In: SystemC: From the Ground Up. Springer, New York, NY. https://doi.org/10.1007/978-0-387-69958-5_9

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  • DOI: https://doi.org/10.1007/978-0-387-69958-5_9

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