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A 0.5 V Continuous-Time ΣΔ Modulator

  • Shouri Chatterjee
  • Kong Pang Pun
  • Nebojša Stanić
  • Yannis Tsividis
  • Peter Kinget
Part of the Analog Circuits and Signal Processing Series book series (ACSP)

Abstract

In this chapter an audio-band continuous-time (CT) ΣΔ modulator is presented as another example of true low voltage design without using low threshold devices or internal voltage boosting. A ΣΔ modulator has a higher level of design complexity than the circuit examples presented in the previous chapters. It requires a clocked comparator and feedback digital-to-analog converters (DAC) in addition to a loop filter of either continuous-time or discrete-time type.

Keywords

Inactive Phase Clock Jitter Peak SNDR Clock Generation Circuit Building Block Circuit 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer Science+Business Media, LLC 2007

Authors and Affiliations

  • Shouri Chatterjee
    • 1
  • Kong Pang Pun
    • 2
  • Nebojša Stanić
    • 3
  • Yannis Tsividis
    • 3
  • Peter Kinget
    • 3
  1. 1.IIT DelhiNew DelhiIndia
  2. 2.Chinese University of Hong KongHong KongChina
  3. 3.Columbia UniversityNew YorkUSA

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