Analog Circuit Design Techniques at 0.5 V pp 97-120 | Cite as
A 0.5 V Continuous-Time ΣΔ Modulator
Chapter
- 1.3k Downloads
Abstract
In this chapter an audio-band continuous-time (CT) ΣΔ modulator is presented as another example of true low voltage design without using low threshold devices or internal voltage boosting. A ΣΔ modulator has a higher level of design complexity than the circuit examples presented in the previous chapters. It requires a clocked comparator and feedback digital-to-analog converters (DAC) in addition to a loop filter of either continuous-time or discrete-time type.
Keywords
Inactive Phase Clock Jitter Peak SNDR Clock Generation Circuit Building Block Circuit
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.
Preview
Unable to display preview. Download preview PDF.
Copyright information
© Springer Science+Business Media, LLC 2007