Lithography Enhancement Techniques
Much variability in key process parameters is highly systematic. The sources and mechanisms of variability are known, and can be described by precise functional dependencies. In front-end processes, the use of subwavelength photolithography has led to severe difficulties in performing predictable pattern transfer. An important manifestation is the variation of the polysilicon gate critical dimension as a function of the 2-D layout neighborhood. Such critical dimension variability has tremendous impact on the timing and power consumption of digital ICs. It can also lead to functional failures due to shorts and opens caused by lithographic non-idealities. Once the systematic variability-generating mechanism is identified, corrective measures can be taken, both at the time of lithography and in the design phase. The purpose of this chapter is to give designers a basic understanding of how the idealized layout that they produce gets distorted by the advanced lithography and what can be done about that. We review the palette of reticle enhancement and design for manufacturability techniques that are currently required for ensuring the quality of the pattern transfer.
KeywordsCritical Dimension Design Rule Process Window Dose Variation Mask Pattern
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