The MOS structure consists of a semiconductor covered by an insulator upon which a conductive electrode is deposited (Fig. 4.1). The term MOS stands for Metal-Oxide-Silicon and stems from earlier technologies that utilized aluminum, silicon dioxide (or simply oxide), and silicon to form the capacitor between source and drain of an MOS Field-Effect Transistor, MOSFET (Chap. 5). The need for a gate conductor that can withstand high-temperature annealing and allow self-alignment of gate to source-drain led to the development of heavily doped n-type or p-type polysilicon gate-conductors to replace aluminum. While doped polysilicon is the gate-conductor of choice for oxide thickness above ˜3nm, its low conductivity compared to metals begins to seriously impact MOSFET performance as device dimensions are reduced to the nanoscale range. Metal-gates, such as tungsten, molybdenum, and fully-silicided polysilicon have therefore become necessary to overcome this limitation. Also, as the silicon-dioxide thickness is reduced below ˜2nm, the level of power-consumption caused by tunneling current through the oxide becomes prohibitive. For such dimensions, it is necessary to replace silicon-dioxide with alternate dielectrics of higher dielectric constant

As will be discussed in Chap. 5, there are several advantages of replacing silicon with semiconductor variants such as silicon-germanium (SiGe) and silicon-carbon (Si : C) alloys, or germanium. In this chapter, however, the term MOS will be used to describe all of the above combinations of gate-conductor, insulator, and semicon ductor.


Gate Voltage Minority Carrier Oxide Thickness Inversion Layer Strong Inversion 
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  1. 1.
    L. M. Terman, “An investigation of surface states at a silicon/silicon oxide interface employing metal-oxide-silicon diodes,” Solid-State Electron., 5 (5), 285–299, 1962.CrossRefGoogle Scholar
  2. 2.
    K. Lehovec, A. Slobodskoy, and J. L. Sprague, “Field effect-capacitance analysis of surface states on silicon,” Phys. Stat. Sol. (b), 3 (3), 447–464, 1963.CrossRefGoogle Scholar
  3. 3.
    A. S. Grove, B. E. Deal, E. H. Snow, and C. T. Sah, “Investigation of thermally oxidized silicon surfaces using metal-oxide-semiconductor structures,” Solid-State Electron., 8 (2), 145–163, 1965.CrossRefGoogle Scholar
  4. 4.
    R. H. Kingston and S. F. Neustadter, “Calculation of the space-charge, electric field, and free carrier concentration at the surface of a semiconductor,” J. Appl. Phys., 26 (6), 718–720, 1955.CrossRefGoogle Scholar
  5. 5.
    E. H. Nicollian and J. R. Brews, MOS Physics and Technology, John Wiley & Sons, 1982.Google Scholar
  6. 6.
    C. E. Young, “Extended curves of the space charge, electric field, and free carrier concen tration of the surface of a semiconductor, and curves of the electrostatic potential inside a semiconductor,” J. Appl. Phys., 32 (3), 329–332, 1961.CrossRefGoogle Scholar
  7. 7.
    A. Many, Y. Goldstein, and N. B. Grover, Semiconductor Surfaces, North Holland, 1971.Google Scholar
  8. 8.
    F. Stern and W. E. Howard, “Properties of semiconductor surface inversion layers in the quan tum limit,” Phys. Rev., 163 (3), 816–835, 1967.CrossRefGoogle Scholar
  9. 9.
    M. J. van Dort, P. H. Woerlee, and A. J. Walker, “A simple model for quantization effects in heavily-doped silicon MOSFETs at inversion conditions,” Solid-State Electron., 37 (3), 411–414, 1994.CrossRefGoogle Scholar
  10. 10.
    C.-Y. Hu, S. Banerjee, K. Sandra, G. G. Streetman, and R. Sivan, “Quantization effects in inversion layers of PMOSFETs on Si (100) substrates,” IEEE Electron Dev. Lett., 17 (6), 276–278, 1996.CrossRefGoogle Scholar
  11. 11.
    S. A. Hareland, S. Krishnamurhty, S. Jallepalli, C.-F. Yeap, K. Hasnat, A. F. Tasch, and C. M. Maziar, “A computationally efficient model for inversion layer quantization effects in deep submicron n-channel MOSFETs,” IEEE Trans. Electron Dev., 43.Google Scholar
  12. 12.
    Y. Ohkura, “Quantum effects in Si n-MOS inversion layer at high substrate concentration,” Solid-State Electron., 33 (12), 1581–1585, 1990.CrossRefGoogle Scholar
  13. 13.
    J. A. López-Villanueva, P. Cartujo-Casinello, J. Banqueri, F. Gámiz, and S. Rodríguez, “Ef fects of the inversion layer centroid on MOSFET behavior,” IEEE Trans. Electron Dev., 44 (11), 1915–1922, 1997.CrossRefGoogle Scholar
  14. 14.
    F. Li, H.-H. Tseng, L. F. Register, P. J. Tobin, and S. K. Barnerjee, “Asymmetry in gate capacitance-voltage (C-V) behavior of ultrathin metal gate MOSFETs with HfO2 gate di electrics,” IEEE Trans. Electron Dev., 53 (8), 1943–1946, 2006.CrossRefGoogle Scholar
  15. 15.
    N. Rodriguez, F. Gamiz, and J. B. Roldan, “Modeling of inversion layer centroid and polysil icon depletion effects on ultrathin-gate-oxide MOSFET behavior: The influence of crystallo graphic orientation,” IEEE Trans. Electron Dev., 54 (4), 723–732, 2007.CrossRefGoogle Scholar
  16. 16.
    S.-I. Tagaki and A. Toriumi, “Quantitative understanding of inversion-layer capacitance in Si MOSFETs,” IEEE Trans. Electron Dev., 42 (12), 2125–2130, 1995.CrossRefGoogle Scholar
  17. 17.
    G. Doucet and F. van de Wiele, “Threshold voltage of nonuniformly doped MOS structures,” Solid-State Electron., 16 (3), 417–423, 1973.CrossRefGoogle Scholar
  18. 18.
    B. E. Deal, “Standardized terminology for oxide charges associated with thermally oxidized silicon,” IEEE Trans. Electron Dev., ED-27, 606–608, 1980.CrossRefGoogle Scholar
  19. 19.
    F. J. Grunthaner, P. J. Grunthaner, R. P. Velasquez, B. F. Lewis, J. Maserjian, and A. Madhukar, “High-resolution x-ray-photoelectron spectroscopy as a probe of local atomic structure: Appli cation to amorphous SiO2 and the Si –SiO2 interface,” Phys. Rev. Lett., 43, 1683–1685, 1979.CrossRefGoogle Scholar
  20. 20.
    F. J. Grunthaner, R. P. Velasquez, and M. H. Hecht, “X-ray photoelectron spectroscopy study of the chemical structure of thermally nitrided SiO2,” Appl. Phys. Lett., 44 (10), 969– 971, 1984.CrossRefGoogle Scholar
  21. 21.
    E. H. Poindexter, E. R. Ahlstrom, and P. J. Caplan, Proc. Intl. Conf. on the Physics of SiO2 and its Interfaces, S. T. Pantilides, ed., p. 227, Pergamon Press, N. Y., 1978.Google Scholar
  22. 22.
    N. M. Johnson, D. K. Biegelsen, M. D. Moyer, S. T. Chang, E. H. Poindexter, and P. J. Caplan, “Electronic traps and Pb centers at the Si/SiO2 interface: Band-gap energy distributions,” J. Appl. Phys., 56 (10) 2844–2849, 1984.CrossRefGoogle Scholar
  23. 23.
    T. Sakurai and T. Sugano, “Theory of continuously distributed trap states at Si –SiO2 inter faces,” J. Appl. Phys., 52 (4), 2889–2896, 1981.CrossRefGoogle Scholar
  24. 24.
    G. Van den Bosch, G. Groeseneken, H. E. Maes, R. B. Klein, and N. S. Saks, “Oxide and interface degradation resulting from substrate hot hole injection in metal oxide semiconductor field effect transistors at 295 K and 77 K,” J. Appl. Phys., 75, 2073–2080, 1994.CrossRefGoogle Scholar
  25. 25.
    B. E. Deal, M. Sklar, A. S. Grove, and E. H. Snow, “Characteristics of the surface-state charge (Qss) of thermally oxidized silicon,” J. Electrochem. Soc., 114, 266–274, 1967.CrossRefGoogle Scholar
  26. 26.
    E. H. Snow, A. S. Grove, B. E. Deal, and C. T. Sah, “Ion transport phenomena in insulating films,” J. Appl. Phys., 36, 1664–1673, 1965.CrossRefGoogle Scholar
  27. 27.
    G. F. Derbenwick, “Mobile ions in SiO2: Potassium,” J. Appl. Phys., 48, 1127–1132, 1977.CrossRefGoogle Scholar
  28. 28.
    A. G. Tangena, N. F. De Rooij, and J. Middelhoek, “Sensitivity of MOS structures for con tamination with H+, Na+ and K+ ions,” J. Appl. Phys., 49, (11), 5576–5583, 1978.CrossRefGoogle Scholar
  29. 29.
    J. S. Logan and D. R. Kerr, “Migration rates of alkali ions in SiO2 films,” Solid-State Dev. Res. Conf., 1965.Google Scholar
  30. 30.
    G. Greeuw and J. F. Verwey, “The mobility of Na+, Li+, K+ ions in thermally grown SiO2 films,” J. Appl. Phys., 56, 2218–2224, 1984.CrossRefGoogle Scholar
  31. 31.
    J. P. Stagg, “Drift mobilities of N+ and K+ ions in SiO2 films,” Appl. Phys. Lett., 31 (8), 532–533, 1977.CrossRefGoogle Scholar
  32. 32.
    D. K. Schroder, Semiconductor Material and Device Characterization, John Wiley & Sons, 1998.Google Scholar
  33. 33.
    B. El-Kareh and R. J. Bombard, Introduction to VLSI Silicon Devices; Physics, Technology and Characterization, Kluwer Academic Publishers, 1986.Google Scholar
  34. 34.
    K. S. Krisch, J. D. Bude, and L. Manchanda, “Gate capacitance attenuation in MOS devices with thin gate dielectrics,” IEEE Electron Dev. Lett., 17 (11), 521–524, 1996.CrossRefGoogle Scholar
  35. 35.
    W. K. Henson, K. Z. Ahmed, E. M. Vogel, J. R. Hauser, J. J. Wortman, R. D. Venables, M. Xu, and D. Venables, “Estimating oxide thickness of tunnel oxides down to 1.4 nm using conventional capacitance-voltage measurements on MOS capacitors,” IEEE Electron Dev. Lett., 20 (4), 179–181, 1999.CrossRefGoogle Scholar
  36. 36.
    D. Vasileska, D. K. Schroder, and D. K. Ferry, “Scaled silicon MOSFETs: Degradation of the total gate capacitance,” IEEE Trans. Electron Dev., 44 (4), 584–587, 1997.CrossRefGoogle Scholar
  37. 37.
    C. Bowen, C. L. Fernando, G. Klimeck, A. Chatterjee, D. Blanks, R. Lake, J. Hu, J. Davis, M. Kulkarni, S. Hattangady, and I.-C. Chen, “Physical oxide thickness extraction and verifi cation using quantum mechanical simulation,” IEDM Tech. Digest, pp. 869–897, 1997.Google Scholar
  38. 38.
    S. Walstra and C. T. Sah, “Thin oxide thickness extrapolation from capacitance-voltage mea surements,” IEEE Trans. Electron Dev., 44 (7), 1136–1142, 1997.CrossRefGoogle Scholar
  39. 39.
    B. J. R. Hauser, “Bias sweep rate effects on quasi-static capacitance of MOS capacitors,” IEEE Trans. Electron Dev., 44 (6), 1009–1012, 1997.CrossRefGoogle Scholar
  40. 40.
    Y. C. Cherng, Han-Cheng Wulu, F. H. Yang, and C. Y. Lu,” Decrease of gate oxide dielectric constant in tungsten polycide gate processes,” IEEE Electron Dev. Lett., 14 (5), 243–245, 1993.CrossRefGoogle Scholar
  41. 41.
    T. J. Hwang, S. H. Rogers, and B. Z. Li, “Work function measurement of tungsten polycide gate structure,” J. Electron. mater., 12, 667–678, 1983.CrossRefGoogle Scholar
  42. 42.
    Y.-C. Yeo, P. Ranade, T.-J. King, and C. Hu, “Effects of high-K gate dielectric materials on metal and silicon gate workfunctions,” IEEE Electron Dev. Lett., 21 (6), 342–344, 2002.Google Scholar
  43. 43.
    C. C. Hobbs, L. R. C. Fonseca, A. Knizhnik, V. Dhandapani, S. B. Samavedam, W. J. Taylor, J. M. Grant, L, G. Dip, D. H. Triyoso, R. I. Hegde, D. C. Gilmer, R. Garcia, D. Roan, M. L. Lovejoy, R. S. Rai, E. A. Hebert, H.-H. Tseng, S. G. H. Anderson, B. E. White, and P. J. Tobin, “Fermi-Level Pinning at the Polysilicon/Metal Oxide interface – Parts I and II,” IEEE Trans. Electron Dev., 51 (6), 971–984, 2004.CrossRefGoogle Scholar
  44. 44.
    M. Zerbst, “Relaxation effects at semiconductor-insulator interfaces”, Z. Angew. Phys., 22, 30–33, 1966.Google Scholar
  45. 45.
    J. S. Kang and D. K. Schoder, “The pulsed MIS capacitor: A critical review,” Phys. Stat. Sol., 89a, 13–43, 1985.CrossRefGoogle Scholar
  46. 46.
    R. Castagné and A. Vapaille, “Determination of the SiO2 –Si interface properties by means of very low frequency MOS capacitance measurements,” Surf. Sci., 28, 157–193, 1971.CrossRefGoogle Scholar
  47. 47.
    M. Kuhn, “A quasi-static technique for MOS C-V and surface state measurements,” Solid-State Electron., 13 (6) 873–885, 1970.CrossRefGoogle Scholar
  48. 48.
    E. H. Nicollian and A. Goetzberger, “The Si–SiO2 interface – electrical properties as deter mined by the metal-insulator-silicon conductance technique,” Bell Syst. Tech. J., 46, 1055– 1133, 1967.Google Scholar
  49. 49.
    S. W. Huang and J.-G. Hwu, “Lateral nonuniformity of effective oxide charges in MOS ca pacitors with Al2O3 gate dielectrics,” IEEE Trans. Electron Dev., 53 (7), 1608–1614, 2006.CrossRefGoogle Scholar
  50. 50.
    B. H. Lee, L. Kang, W.-J. Qi, R. Nieh, Y. Jeon, K. Onishi, and J. C. Lee, “Ultrathin hafnium oxide with low leakage and excellent reliability for alternative gate dielectric application,” IEEE IEDM Tech. Digest, pp. 133–137, 1999.Google Scholar
  51. 51.
    C. Leroux, J. Mitard, G. Ghibaudo, X. Garros, G. Reimbold, B. Guillaumot, and F. Martin, “Characterization and modeling of hysteresis phenomena in high K dielectrics,” IEDM Tech. Digest, 737–740, 2004.Google Scholar
  52. 52.
    C. N. Berglund, “Surface states at steam-grown silicon-silicon dioxide interfaces,” IEEE Trans. Electron Dev., ED-13 (10), 701–705, 1966.CrossRefGoogle Scholar
  53. 53.
    M. Kuhn and D. J. Silversmith, “Ionic contamination and transport of mobile ions in MOS structures,” J. Electrochem. Soc., 118, 966–970, 1971.CrossRefGoogle Scholar
  54. 54.
    M. Depas, B. Vermeire, P. W. Mertens, R. L. van Meirhaeghe, and M. M. Heyns, “Determina tion of tunneling parameters in ultra-thin oxide layer poly-Si/SiO2/Si structures,” Solid-State Electron., 38 (8), 1465–1471, 1995.CrossRefGoogle Scholar
  55. 55.
    M. Lenzlinger and E. H. Snow. “Fowler-Nordheim tunneling into thermally grown SiO2” J.Appl. Phys., 40, 278–283, 1969.CrossRefGoogle Scholar
  56. 56.
    W.-C. Lee and C. Hu, “Modeling CMOS tunneling currents through ultrathin gate oxide due to conduction and valence-band electron and hole tunneling,” IEEE Trans. Electron Dev., 48 (7), 1366–1373, 2001.CrossRefGoogle Scholar
  57. 57.
    E. H. Nicollian, A. Goetzberger, and C. N. Berglund, “Avalanche injection currents and charg ing phenomena in thermal SiO2,” Appl. Phys. Lett., 15, 174–176, 1969.CrossRefGoogle Scholar

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