This book examines the power consumption of ASIC and custom interated- circuits. In particular, we examine the relationship between custom circuits designed without any significant restriction in design methodology and ASIC circuits designed in a high-productivity EDA tool methodology. From analysis of similar ASIC and custom designs, we estimate that the power consumption of typical ASICs may be 3 to 7× that of custom ICs fabricated in process technology of the same generation. We consider ways to augment and enhance an ASIC methodology to bridge this power gap between ASIC and custom.
KeywordsField Programmable Gate Array Logic Gate Custom Design PMOS Transistor ASIC Design
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