Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
T. Sakurai, K. Nogami, M. Kakumu and T. Iizuka, “Hot-carrier generation in submicrometer VLSI environment,” IEEE J. Solid-State Circuits, vol. SC-21, pp. 187–192, Feb. 1986.
K. Nogami, K. Sawada, M. Kinugawa and T. Sakurai, “VLSI circuit reliability under AC hot-carrier stress,” in Symp. VLSI Circuits Dig. Tech. Papers, May 1987, pp.13–14.
Y. Nakagome, K. Itoh, K. Takeuchi, E. Kume, H. Tanaka, M. Isoda, T. Mushya, T. Kaga, T. Kisu, T. Nishida, Y. Kawamoto and M. Aoki, “Circuit techniques for 1.5-3.6-V battery-operated 64-Mb DRAM,” IEEE J. Solid-State Circuits, vol. 26, pp. 1003–1010, July 1991.
Y. Kanno, H. Mizuno, N. Oodaira, Y. Yasu and K. Yanagisawa, “$μ I/O architecture for 0.13-um wide-voltage-range system-on-a-package (SoP) designs,” in Symp. VLSI Circuits Dig. Tech. Papers, June 2002, pp. 168–169.
H. Tanaka, “Charge pump with improved reliability,” US Patent No. 6456152, Sep. 2002.
G. Singh, “A high speed 3.3V IO buffer with 1.9V tolerant CMOS process,” in Proc. ESSCIRC, Sep. 1997, pp. 128–131.
D. Greenhill, E. Anderson, J. Bauman, A. Charnas, R. Cheeria, H. Chen, M. Doreswamy, P. Ferolito, S. Gopaladhine, K. Ho, W. Hsu, P. Kongetira, R. Melanson, V. Reddy, R. Salem, H. Sathianathan, S. Shah, K. Shin, C. Srivatsa and R. Weisenbach, “A 330MHz 4-way superscalar microprocessor,” in ISSCC Dig. Tech. Papers, Feb. 1997, pp. 166–167.
J. Connor, D. Evans, G. Braceras, J. Sousa, W. W. Abadeer, S. Hall and M. Robillard, “Dynamic dielectric protection for I/O circuits fabribated in a 2.5V CMOS technology interfacing to a 3.3V LVTTL bus,” in Symp. VLSI Circuits Dig. Tech. Papers, June 1997, pp. 119–120.
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2007 Springer Science+ Business Media, LLC
About this chapter
Cite this chapter
Itoh, K., Horiguchi, M., Tanaka, H. (2007). High-Voltage Tolerant Circuits. In: Itoh, K., Horiguchi, M., Tanaka, H. (eds) Ultra-Low Voltage Nano-Scale Memories. Series On Integrated Circuits And Systems. Springer, Boston, MA. https://doi.org/10.1007/978-0-387-68853-4_9
Download citation
DOI: https://doi.org/10.1007/978-0-387-68853-4_9
Publisher Name: Springer, Boston, MA
Print ISBN: 978-0-387-33398-4
Online ISBN: 978-0-387-68853-4
eBook Packages: EngineeringEngineering (R0)