This chapter describes the quadratic placer called “Kraftwerk.” Kraftwerk is based on distributing the modules on the chip by using an additional force. The additional force is separated in this placer into two forces: hold force and move force. Both of these forces are determined without any heuristics. This novel systematic force modeling yields the robustness of our iterative placement algorithm by provably converging to an overlap-free placement.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
International technology roadmap for semiconductors. http://public.itrs.net
W.-J. Sun and C. Sechen. Efficient and effective placement for very large circuits. In IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pages 170-177, 1993
R.-S. Tsay, E.S. Kuh, and C.-P. Hsu. PROUD: A sea-of-gates placement algorithm. ieeedesigntest, pages 44-56, December 1988
J.A. Roy, D.A. Papa, S.N. Adya, H.H. Chan, A.N. Ng, J.F. Lu, and I.L. Markov. Capo: Robust and scalable open-source min-cut floorplacer. In ACM/SIGDA International Symposium on Physical Design (ISPD), pages 224-226, 2005
T. Taghavi, X. Yang, and B.-K. Choi. Dragon2005: Large-scale mixed-size placement tool. In ACM/SIGDA International Symposium on Physical Design (ISPD), pages 245-247, 2005
A.R. Agnihorti, S. Ono, C. Li, M.C. Yildiz, A. Khathate, C.-K. Koh, and P.H. Madden. Mixed block placement via fractional cut recursive bisection. IEEE Transactions on Computer-Aided Design of Circuits and Systems, 24(5):748-761, May 2005
W. Naylor, R. Donelly, and L. Sha. Non-linear optimization system and method for wire length and delay optimization for an automatic electric circuit placer. U.S. Patent 6301693, October 2001
K.G. Murty and F.-T. Yu. Linear complementary, linear and nonlinear programming. http://ioe.engin.umich.edu/people/fac/books/murty/linear complementarity webbook/
A.B. Kahng and Q. Wang. Implementation and extensibility of an analytic placer. IEEE Transactions on Computer-Aided Design of Circuits and Systems, 24(05):734-747, May 2005
T. Chan, J. Cong, and K. Sze. Multilevel generalized force-directed method for circuit placement. In ACM/SIGDA International Symposium on Physical Design (ISPD), pages 185-192, 2005
T.-C. Chen, Z.-W. Jiang, T.-C. Hsu, H.-C. Chen, and Y.-W. Chang. A high-quality mixedsize analytical placer considering preplaced blocks and density constraints. In IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pages 187-192, 2006
J.M. Kleinhans, G. Sigl, F.M. Johannes, and K.J. Antreich. GORDIAN: VLSI placement by quadratic programming and slicing optimization. IEEE Transactions on ComputerAided Design of Circuits and Systems, CAD-10(3):356-365, March 1991
H. Eisenmann and F.M. Johannes. Generic global placement and floorplanning. In ACM/ IEEE Design Automation Conference (DAC), pages 269-274, June 1998
B. Hu and M. Marek-Sadowska. FAR: Fixed-points addition & relaxation based placement. In ACM/SIGDA International Symposium on Physical Design (ISPD), pages 161-166, 2002
N. Viswanathan and C. C.-N. Chu. Fastplace: Efficient analytical placement using cell shifting, iterative local refinement and a hybrid net model. IEEE Transactions on Computer-Aided Design of Circuits and Systems, 24(5):722-733, May 2005
B. Hu and M. Marek-Sadowska. Multilevel fixed-point-addition-based vlsi placement. IEEE Transactions on Computer-Aided Design of Circuits and Systems, 24 (8):1188-1203, August 2005
U. Brenner and M. Struzyna. Faster and better global placement by a new transportation algorithm. In ACM/IEEE Design Automation Conference (DAC), pages 591-596, June 2005
G.-J. Nam, S. Reda, C.J. Alpert, P.G. Villarrubia, and A.B. Kahng. A fast hierarchical quadratic placement algorithm. IEEE Transactions on Computer-Aided Design of Circuits and Systems, 25(4):678-691, April 2006
A. Kennings and K.P. Vorwerk. Force-directed methods for generic placement. IEEE Transactions on Computer-Aided Design of Circuits and Systems, 25(10):2076-2087, October 2006
M.C. Van Lier and R.H.J.M. Otten. Planarization by transformation. IEEE Transactions on Circuits and Systems CAS, 20(2):169-171, March 1973
J. Vygen. Algorithms for large-scale flat placement. In ACM/IEEE Design Automation Conference (DAC), pages 746-751, 1997
G. Sigl, K. Doll, and F.M. Johannes. Analytical placement: A linear or a quadratic objective function? In ACM/IEEE Design Automation Conference (DAC), pages 427-432, SanFrancisco, 1991
M. Hanan. On Steiner’s problem with rectiliner distance. SIAM Journal of Applied Mathemetics, 14(2):255-265, 1966
C. Chu. FLUTE: Fast lookup table based wirelength estimation technique. In IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pages 696-701, 2004
K.M. Hall. An r-dimensional quadratic placement algorithm. Management Science, 17(3):219-229, November 1970
B. Obermeier and F.M. Johannes. Temperature-aware global placement. In Asia and South Pacific Design Automation Conference, volume 1, pages 143-148, Yokohama, Japan, January 2004
M. Kowarschik and C. Weiß. DiMEPACK - A Cache-optimized multigrid library. In H.R. Arabnia, editor, Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA, pages 425-430. CSREA Press, June 2001
W.E. Donath. Complexity theory and design automation. In ACM/IEEE Design Automation Conference (DAC), volume 19, pages 412-419, 1980
B. Obermeier and F. M. Johannes. Quadratic placement using an improved timing model. In ACM/IEEE Design Automation Conference (DAC), pages 705-710, San Diego, June 2004
P. Spindler and F.M. Johannes. Fast and robust quadratic placement based on an accurate linear net model. In IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2006
International symposium on physical design. http://www.ispd.cc
A.B. Kahng, S. Reda, and Q. Wang. Architecture and details of a high quality, large-scale analytical placer. In IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pages 890-897, 2005
G.-J. Nam, C.J. Alpert, P. Villarrubia, B. Winter, and M. Yildiz. The ISPD2005 placement contest and benchmark suite. In ACM/SIGDA International Symposium on Physical Design (ISPD), pages 216-219, May 2005
Standard Performance Evaluation Corporation. SPEC CPU 2000. http://www. spec.org/cpu2000
J. Cong, M. Romesis, J.R. Shinnerl, K. Sze, and M. Xie. Locality and utilization in placement suboptimality. Technical report, UCLA Computer Science Department, 2006
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2007 Springer Science+Business Media, LLC
About this chapter
Cite this chapter
Spindler, P., Johannes, F.M. (2007). Kraftwerk: A Fast and Robust Quadratic Placer Using an Exact Linear Net Model. In: Nam, GJ., Cong, J. (eds) Modern Circuit Placement. Series on Integrated Circuits and Systems. Springer, Boston, MA. https://doi.org/10.1007/978-0-387-68739-1_4
Download citation
DOI: https://doi.org/10.1007/978-0-387-68739-1_4
Publisher Name: Springer, Boston, MA
Print ISBN: 978-0-387-36837-5
Online ISBN: 978-0-387-68739-1
eBook Packages: EngineeringEngineering (R0)