Abstract
An Image Feature Associative Processor (IFAP), which extracts local and grobal features of input image data based on bio-inspired parallel architecture, is proposed. It consists of an image sensor, a cellular automaton and pattern matching processors based on PWM analogdigital merged circuits. IFAP extracts image features at a standard video frame rate with low power dissipation.
The original version of this chapter was revised: The copyright line was incorrect. This has been corrected. The Erratum to this chapter is available at DOI: 10.1007/978-0-387-35498-9_57
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© 2000 IFIP International Federation for Information Processing
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Iwata, A. et al. (2000). A Feature Associative Processor for Image Recognition Based on a A-D Merged Architecture. In: Silveira, L.M., Devadas, S., Reis, R. (eds) VLSI: Systems on a Chip. IFIP — The International Federation for Information Processing, vol 34. Springer, Boston, MA. https://doi.org/10.1007/978-0-387-35498-9_8
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DOI: https://doi.org/10.1007/978-0-387-35498-9_8
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4757-1014-4
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