Abstract
In this paper we describe the simulator FASTNR (FAST Newton-Raphson) where an efficient methodology for solving the faulty circuit equations, called FAult RUBber Stamps (FARUBS), is implemented. Its application to single fault simulation in linear and nonlinear circuits is reported. The efficient fault simulation in nonlinear DC circuits is due both to the development of original linearized Newton-Raphson models for electronic devices and to the simulation of fault values in a “continuation” stream. Fault simulation in linear cascades with up to 5000 nodes has shown an improvement of four orders of magnitude in simulation time, when compared to that of the nominal circuit. In nonlinear circuits, the time efficiency is sometimes better than two orders of magnitude.
The original version of this chapter was revised: The copyright line was incorrect. This has been corrected. The Erratum to this chapter is available at DOI: 10.1007/978-0-387-35498-9_57
Chapter PDF
Similar content being viewed by others
Keywords
References
J. W. Bandler and A. E. Salama, “Fault diagnosis of analog circuits,” Proceedings of the IEEE, vol. 73, 8, Aug., 1985.
J. L. Huertas, Test and Design for Testability of Analog and Mixed-Signal Integrated Circuits: Theoretical Basis and Pragmatical Approaches, in H. Dedieu (Ed.), Selected Topics in Circuits and Systems, Elsevier, ECCTD’93, Davos, Switzerland, 1993.
J. S. Augusto, Fault Simulation and Diagnosis in Analog Circuits, Ph. D. Thesis (in Portuguese), Instituto Superior Técnico, Lisbon, 1999.
J. S. Augusto and C. B. Almeida, Efficient Fault Simulation, Diagnosis and Testability Evaluation in Linear and Nonlinear Circuits with Fault Rubber Stamps. ETW97 Proc, Cagliari, Italy, 1997.
J. Vlach and K. Singhal, Computer Methods for Circuit Analysis and Design. Van Nostrand Reinhold, second edition, 1994.
W. Press, S. Teukolsky, W. Vetterling, and B. Flannery, Numerical Recipes in C. Cambridge University Press, 1992.
A. Pahwa and R. Rohrer, Band Faults: Efficient Approximations to Fault Bands for the Simulation Before Fault Diagnosis of Linear Circuits. IEEE Tr. CAS-29, no. 2, pp. 81–8, Feb. 1982.
I. S. Duff, A. M. Erisman, and J. K. Reid, Direct Methods for Sparse Matrices. Oxford, 1986.
I. N. Hajj, Updating method for LU factorization. Electronic Letters, vol. 8, no 7, 1972.
Lin P-M. and Elcherif Y., “Analogue Circuits Fault Dictionary - New Approaches and Implementation,” Cir. Th. and Appl., 12, pp 149–172, 1985.
V. Prasad, Equations of Nonlinear Analogue Circuit for Fault Dictionary Generation. Electronics Letters, vol. 26, no. 1, pp. 24–5, Jan, 1990.
P. A. Brennan, C.-W. Ho, A. E. Ruehli and P. A. Brennan, “The modified nodal approach to network analysis,” IEEE Transactions on Circuits and Systems, CAS-22, pp. 504–509, 1975.
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2000 IFIP International Federation for Information Processing
About this chapter
Cite this chapter
Augusto, J.S., Almeida, C.F.B. (2000). FASTNR: An Efficient Fault Simulator for Linear and Nonlinear DC Circuits. In: Silveira, L.M., Devadas, S., Reis, R. (eds) VLSI: Systems on a Chip. IFIP — The International Federation for Information Processing, vol 34. Springer, Boston, MA. https://doi.org/10.1007/978-0-387-35498-9_24
Download citation
DOI: https://doi.org/10.1007/978-0-387-35498-9_24
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4757-1014-4
Online ISBN: 978-0-387-35498-9
eBook Packages: Springer Book Archive