Abstract
The design of embedded systems has to address several interacting design aspects, so-called dimensions, to capture parallelism, distribution over different locations and hard real-time requirements. Thus, a structured design process has been established with the PARADISE design environment. The design process covers all steps from behavioral specification to final chip realization. In this paper, we describe how system specification and refinement is covered in combination with the processes available in PARADISE. An example of an adequate specification and modeling language is considered and adapted for integration into PARADISE. First results show the feasibility of integrating the respective concepts.
The original version of this chapter was revised: The copyright line was incorrect. This has been corrected. The Erratum to this chapter is available at DOI: 10.1007/978-0-387-35409-5_23
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Keywords
- Design Environment
- Design Dimension
- Design Space Exploration
- Schedulability Analysis
- European Telecommunication Standard Institute
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© 2001 IFIP International Federation for Information Processing
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Rettberg, A., Rammig, F.J., Gerstlauer, A., Gajski, D.D., Hardt, W., Kleinjohann, B. (2001). The Specification Language SpecC within the PARADISE Design Environment. In: Kleinjohann, B. (eds) Architecture and Design of Distributed Embedded Systems. DIPES 2000. IFIP — The International Federation for Information Processing, vol 61. Springer, Boston, MA. https://doi.org/10.1007/978-0-387-35409-5_11
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DOI: https://doi.org/10.1007/978-0-387-35409-5_11
Publisher Name: Springer, Boston, MA
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