Abstract
For the implementation of multipoint-to-point connections in ATM, various approaches exist, each with its own advantages and disadvantages. VP-based methods require unique sender identification but they do not require reassembly in merging points. In contrast, VC-based methods do not require unique sender identification but they do require reassembly in merging points. It is likely that VC merging will be the method of choice as it is scalable and yet relatively simple to implement. One of its drawbacks is the increased output buffer space required at the switches because of packet reassembly at the merging points. This paper investigates the impact of the switch architecture and characteristics on the output buffer space by means of simulation. The results obtained demonstrate that for typical switch architectures, VC merging does not require significant additional buffering compared to VP merging.
Work performed at IBM Research Division, Zurich Research Laboratory.
The original version of this chapter was revised: The copyright line was incorrect. This has been corrected. The Erratum to this chapter is available at DOI: 10.1007/978-0-387-35388-3_42
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© 1998 IFIP International Federation for Information Processing
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Schmid, A.L., Iliadis, I., Droz, P. (1998). Impact of VC Merging on Buffer Requirements in ATM Networks. In: van As, H.R. (eds) High Performance Networking. HPN 1998. IFIP — The International Federation for Information Processing, vol 8. Springer, Boston, MA. https://doi.org/10.1007/978-0-387-35388-3_12
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DOI: https://doi.org/10.1007/978-0-387-35388-3_12
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