Abstract
Image recognition may consist of three main steps: edge detection, edge linking, and object/template matching. Edge detection algorithms usually produce thin edges with discontinuities. In this paper, a real-time algorithm and its VLSI implementation for linking broken edges is presented. First, all broken edge points inside a 12×12 moving window are identified. The 12×12 window scans the input gray level edge map converting it into three levels of intensities using two threshold values. Decisions of linking the stronger edge break points are made based on their directions and/or with the guidance of the weak edge lines. The proposed VLSI architecture is capable of running the proposed edge linking algorithm in real-time outputting one pixel of the linked edge map per clock cycle with a latency of 11n+12 clock cycles, where n is the number of pixel columns in the image.
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© 1997 Springer Science+Business Media Dordrecht
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Hajjar, A., Chen, T. (1997). A VLSI architecture for real-time edge linking. In: Reis, R., Claesen, L. (eds) VLSI: Integrated Systems on Silicon. IFIP — The International Federation for Information Processing. Springer, Boston, MA. https://doi.org/10.1007/978-0-387-35311-1_2
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DOI: https://doi.org/10.1007/978-0-387-35311-1_2
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4757-6949-4
Online ISBN: 978-0-387-35311-1
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