Abstract
One of the important aspects in synthesizing from multi-process specifications is to deal with the existence of complex data between the processes. In this paper we focus on the allocation of memory elements and busses for realizing such data exchanges. The synthesis approach minimizes the communication delays, taking the area demand for the needed communication structure into consideration. The global data are clustered according to a distance factor which is derived by an analysis of the specification. This clustering information is then used to appropriately partition the global data into subsets which can be assigned to a cost minimal memory and bus structure.
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© 1995 IFIP International Federation for Information Processing
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Müller, J., Kumar, R. (1995). Optimizing the Communication Overheads during the Allocation of Global Memories and Busses. In: Saucier, G., Mignotte, A. (eds) Logic and Architecture Synthesis. IFIP Advances in Information and Communication Technology. Springer, Boston, MA. https://doi.org/10.1007/978-0-387-34920-6_35
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DOI: https://doi.org/10.1007/978-0-387-34920-6_35
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-5041-2923-7
Online ISBN: 978-0-387-34920-6
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