Abstract
The aim of this paper is not to improve the fastest adder, but instead to give a method to balance complexity and speed.
The paper is organized as follows: the Δ operator introduced by Brent and Kung (Brent-Kung 1982) is first recalled. Then it is used to design “standard” adders (Coren 1993), where the critical path is the longest path from any input of the adder to any output. Several well known adder structural organizations exhibiting different speed/area trade off are described by an unified formalism. By mixing different styles (Guyot 1993), the lowest cost for an imposed delay can be achieved. Then the Δ operators will be replaced with a ROBDDs (Reduced Ordered Binary Decision Diagramms) representation, and we shall see why this representation makes the adders easier to manipulate and to optimize for different technologies (Detjens-Gannot 1993)(Sakouti 1992).
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© 1995 IFIP International Federation for Information Processing
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Guyot, A., Belrhiti, M., Bosco, G. (1995). Adders synthesis. In: Saucier, G., Mignotte, A. (eds) Logic and Architecture Synthesis. IFIP Advances in Information and Communication Technology. Springer, Boston, MA. https://doi.org/10.1007/978-0-387-34920-6_28
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DOI: https://doi.org/10.1007/978-0-387-34920-6_28
Publisher Name: Springer, Boston, MA
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