A specification written in the ISO standardized Estelle language can be translated into the standard hardware description language VHDL. In this paper we present such a translator and we discuss an example of its application. The Estelle formal description technique is used for specification and validation of communication protocols. VHDL is considered as an intermediate step, using of the existing simulation and synthesis tools.


Estelle VHDL protocol prototyping 


  1. Bauer, M. and Ecker, W. (1993) Communication Mechanisms for VHDL Specification and Design Starting at System Level. Proc. VHDL Forum for CAD in Europe, Spring’93 Meeting, Austria, March, 95–106.Google Scholar
  2. Benders, L.P.M. and Stevens, M.P.J. (1991) Task Level Behavioral Hardware Description. Microprocessing & Microprogramming, 32, 323–32.CrossRefGoogle Scholar
  3. Benders, L.P.M. and Stevens, M.P.J. (1993) TL: A System Specification System. Micro-processing and Microprogramming 38, 835–42.CrossRefGoogle Scholar
  4. Budkowski, S. and Dembinski, P. (1987) An Introduction to ESTELLE. A Specification Lan-guage for Distributed Systems. Computer Networks and ISDN Systems, 14, 3–23.CrossRefGoogle Scholar
  5. Budkowski, S. (1992) Estelle development toolset (EDT). Computer Networks and ISDN Sys-tems 25, 63–82.CrossRefGoogle Scholar
  6. Coelho, D. (1989) The VHDL Handbook. Kluwer Academic Publishers.Google Scholar
  7. Dutt, N.D. (1991) A User Interface for VHDL Behavioral Modeling. Proc. CHDL’91, Marseille, France, 375–93.Google Scholar
  8. Glunz, W. and Kruse, T. et al. (1993) Integrating SDL and VHDL for System-Level Hardware Designing, in IFIP Transactions on Computer Hardware Description Languages (ed. D. Agnew, L. Claesen, R. Camposano) Elsevier Science Publishers B. V.Google Scholar
  9. Jerraya, A. and O’Brien, K. et al. (1993) Linking System Design Tools and Hardware Design Tools. Proc. CHDL’93, 331–8.Google Scholar
  10. Jerraya, A. and O’Brien, K. (1994) SOLAR: an intermediate format for system-level modeling and synthesis. Chapter 7 in Codesign compute aided software/hardware engineering, (ed J. Rozemblit and Klaus Buchenrieder) IEEE press, 145–75.Google Scholar
  11. Delgado Kloos, C. and de Miguel Moro, T. et al. (1993) VHDL Generation from a Timed Extension of the Formal Description Technique LOTOS within the FORMAT project. Micro-processing and Microprogramming 38, 589–96.CrossRefGoogle Scholar
  12. Vahid, F. and Narayan, S. et al. (1991) SpecCharts: A language for System Level Design. Proc. CHDL 91, 145–55.Google Scholar
  13. Woo, A.C. and Peppard, L.E. (1992) System-Level Modelling in VHDL. Microelectronic Journal, 23, 223–30.CrossRefGoogle Scholar
  14. Wytrebowicz, J. and Budkowski, S. (1994) Communication Protocols Implemented in Hardware: VHDL Generation from Estelle. Proc. VHDL-Forum for CAD in Europe, Fall’94 Meeting, 29–40.Google Scholar
  15. Wytrebowicz, J. (1994) VHDL Generation from Estelle. Research Report N° 941103, Institut National des Telecommunications, Evry, France.Google Scholar

Copyright information

© IFIP International Federation for Information Processing 1996

Authors and Affiliations

  • Jacek Wytrębowicz
    • 1
  1. 1.Institut National des TélécommunicationstFourierFrance

Personalised recommendations