Parallel object-oriented descriptions of graph reduction machines

Extended abstract
  • David Bolton
  • Chris Hankin
  • Paul Kelly
Submitted Presentations
Part of the Lecture Notes in Computer Science book series (LNCS, volume 365)


Abstract machine descriptions of parallel computer architectures must capture communications and concurrency characteristics at a high level. Current design techniques and notations are weak in this respect. We present a layered method for refinement of a requirements specification through to a detailed systems architecture design.

This paper concentrates on the two highest layers, the logical model, which is a requirements statement, and the systems architecture, which specifies logical processes and explicit communications. While requirements are expressed in a language that matches the problem domain, we suggest that a parallel object-oriented notation is most appropriate for the systems architecture layer. Refinements within this layer reflect implementation details (eg. structure sharing and distribution of work among processing elements). We introduce a parallel object-oriented notation based on rewriting systems concepts and use it to refine the design of a parallel graph reduction machine to execute functional programs.

The notation used is a natural extension of a graph rewriting language and the work forms the basis for a structured explication of parallel graph rewriting in which all communications are made explicit.


Parallel combinator reduction graph rewriting systems object-oriented programming 


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Copyright information

© Springer-Verlag Berlin Heidelberg 1989

Authors and Affiliations

  • David Bolton
    • 1
  • Chris Hankin
    • 2
  • Paul Kelly
    • 2
  1. 1.Dept of Computer ScienceCity UniversityLondon
  2. 2.Dept of ComputingImperial CollegeLondon

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