Model Checking: Historical Perspective and Example (Extended Abstract)

  • Edmund M. Clarke
  • Sergey Berezin
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 1397)


Model checking is an automatic verification technique for finite state concurrent systems such as sequential circuit designs and communication protocols. Specifications are expressed in propositional temporal logic. An exhaustive search of the global state transition graph or system model is used to determine if the specification is true or not. If the specification is not satisfied, a counterexample execution trace is generated if possible. By encoding the model using Binary Decision Diagrams (BDDs) it is possible to search extremely large state spaces with as many as 10120 reachable states. In this paper we describe the theory underlying this technique and outline its historical development. We demonstrate the power of model checking to find subtle errors by verifying the Space Shuttle Three-Engines-Out Contingency Guidance Protocol.


Model Check Temporal Logic Linear Temporal Logic Space Shuttle Concurrent System 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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Copyright information

© Springer-Verlag Berlin Heidelberg 1998

Authors and Affiliations

  • Edmund M. Clarke
    • 1
  • Sergey Berezin
    • 1
  1. 1.Carnegie Mellon UniversityUSA

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