Abstract
An Ordered Binary Decision Diagram (OBDD) is a directed acyclic graph representing a Boolean function. The size of OBDDs largely depends on the variable ordering. In this paper, we show the size of the OBDD representing the i-th bit of the output of n-bit/n-bit integer division is Ω(2(n-i)/8) for any variable ordering. We also show that V-OBDDs, Λ-OBDDs and ⊕-OBDDs representing integer division has the same lower bounds on the size. We develop new methods for proving lower bounds on the size of V-OBDDs, Λ-OBDDs and ⊕-OBDDs.
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References
S.B. Akers, “Binary Decision Diagrams,” IEEE Trans. Comput., vo1.C-27, no.6, pp.509–516, 1978.
R.E. Bryant, “Graph-Based Algorithms for Boolean Function Manipulation,” IEEE Trans. Comput., vo1.C-35, no.8, pp.667–691, 1986.
R.E. Bryant, “On the Complexity of VLSI Implementations and Graph Representations of Boolean Functions with Application to Integer Multiplication,” IEEE Trans. Comput., vol.40, no.2, pp.205–213, 1991.
J.R. Burch, E.M. Clarke, K.L. McMillan and D.L. Dill, “Sequential Circuit Verification Using Symbolic Model Checking,” in Proc. 27th ACM/IEEE DAC, pp.46–51, 1990.
J. Gergov, “Time-Space Tradeoffs for Integer Multiplication on Various Types of Input Oblivious Sequential Machines,” Information Processing Letters, vol.51, no.5, pp.265–269, 1994.
T. Horiyama, Y. Takenaga and S. Yajima, “Solving an NP-complete Combinatorial Problem Using Multiple OBDDs,” KUIS Technical report, KUIS-96-0005, 1996.
R.J. Lipton and R. Sedgewick, “Lower Bounds for VLSI,” in Proc. 13th STOC, pp.300–307, 1981.
H. Sawada, Y. Takenaga and S. Yajima, “On the Computational Power of Binary Decision Diagrams,” IEICE Trans. Information and Systems, vol.E77-D, no.6, pp.611–618, 1994.
I. Semba and S. Yajima, “Combinatorial Algorithms Using Boolean Processing,” Trans. IPSJ, vol.35, no.9, pp.1661–1673, 1994.
K. Takagi, K. Nitta, H. Bouno, Y. Takenaga and S. Yajima, “Computational Power of Non deterministic Ordered Binary Decision Diagrams and Their Subclasses,” IEICE Trans. Fundamentals, vol.E80-A, no.4, pp.663–669, 1997.
N. Takahashi, N. Ishiura and S. Yajima, “Fault Simulation for Multiple Faults Using BDD Representation of Fault Sets,” in Proc. IEEE/ACM ICCAD, pp.550–553, 1991.
C.D. Thompson, “Area-Time Complexity for VLSI,” in Proc. 11th STOC, pp.81–88, 1979.
A.C. Yao, “The Entropic Limitations of VLSI Computations,” in Proc. 13th STOC, pp.308–311, 1981.
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© 1997 Springer-Verlag Berlin Heidelberg
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Horiyama, T., Yajima, S. (1997). Exponential lower bounds on the size of OBDDs representing integer division. In: Leong, H.W., Imai, H., Jain, S. (eds) Algorithms and Computation. ISAAC 1997. Lecture Notes in Computer Science, vol 1350. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-63890-3_19
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DOI: https://doi.org/10.1007/3-540-63890-3_19
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