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Auto-configurable array for GCD computation

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Field-Programmable Logic and Applications (FPL 1997)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 1304))

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Abstract

A novel one-directional pass-through array for the computation of integer greatest common divisor is designed and implemented on Atmel FPGA. The design is based on the plus-minus GCD algorithm and works in LSB pipelined manner. In contrast with previous designs, the length of the new array is independent of the length of the operands: arbitrary long integers can be processed in multiple passes. The array is auto-configurable: at each step, one new cell is configured according to the input from the previous computation. Preliminary experiments show that for 100 bits a speed-up of 4 over software can be obtained using one 6010 Atmel chip.

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References

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Author information

Authors and Affiliations

  1. RISC-Linz, A-4040, Linz, Austria

    Tudor Jebelean

Authors
  1. Tudor Jebelean
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Editor information

Wayne Luk Peter Y. K. Cheung Manfred Glesner

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© 1997 Springer-Verlag Berlin Heidelberg

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Jebelean, T. (1997). Auto-configurable array for GCD computation. In: Luk, W., Cheung, P.Y.K., Glesner, M. (eds) Field-Programmable Logic and Applications. FPL 1997. Lecture Notes in Computer Science, vol 1304. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-63465-7_251

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  • DOI: https://doi.org/10.1007/3-540-63465-7_251

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-63465-2

  • Online ISBN: 978-3-540-69557-8

  • eBook Packages: Springer Book Archive

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