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International Workshop on Field Programmable Logic and Applications

FPL 1997: Field-Programmable Logic and Applications pp 41–50Cite as

Performance evaluation of a full speed PCI initiator and target subsystem using FPGAs

  • Devices and Architectures
  • Conference paper
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Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 1304))

Abstract

State-of-the-art FPGAs are just capable of implementing PCI bus initiator and target functions at the original bus speed of 33 MHz. This paper reports on the use of a Xilinx 4000 series FPGA and LogiCore macros to implement a fully compliant PCI card for a specialist data acquisition application. The design required careful performance analysis and manual intervention during the design process to ensure successful operation.

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References

  1. PCI Local Bus Specification Revision 2.1, PCI Special Interest Group, USA, 1995

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  2. Fawcett, B K, ”Designing PCI Bus Interfaces with Programmable Logic”, Eighth Annual IEEE International ASIC Conference, Austin, USA, 1995

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  3. LogiCore PCI Master and Slave Interface User's Guide Version 1.1. Section 8.1, Xilinx, USA, 1996

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  4. Luk, W and Shirazi, N, ”Modelling and Optimising Run-Time Reconfigurable Systems”, Proc. IEEE Symposium on FPGAs for Custom Computing Machines, USA, 1996

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  5. The Peripheral Component Interconnect Bus X-Note Number 5A, Xilinx, USA, January 1995

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  6. Intel 430VX PCISET 4.6.1, Intel Corporation, USA, 1996

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  7. VtoolsD, Version 2.01.001, Vireo Software, USA, 1995

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  8. Holmberg, Per, CORE-BASED FPGA DESIGNS, Special Report: ”Intellectual Property: Reusable Cores & Macros”, http://www.pldsite.conV, 1996

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Author information

Authors and Affiliations

  1. Dept. Electrical and Electronic Engineering, University of Strathclyde, 204 George Street, G1 1XW, Glasgow, United Kingdom

    David Robinson, Patrick Lysaght & Gordon McGregor

  2. Dynamic Imaging Ltd, Brucefield Industrial Park, 9 Cochrane Square, Livingston, Scotland, United Kingdom

    Hugh Dick

Authors
  1. David Robinson
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  2. Patrick Lysaght
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  3. Gordon McGregor
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  4. Hugh Dick
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Editor information

Wayne Luk Peter Y. K. Cheung Manfred Glesner

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© 1997 Springer-Verlag Berlin Heidelberg

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Robinson, D., Lysaght, P., McGregor, G., Dick, H. (1997). Performance evaluation of a full speed PCI initiator and target subsystem using FPGAs. In: Luk, W., Cheung, P.Y.K., Glesner, M. (eds) Field-Programmable Logic and Applications. FPL 1997. Lecture Notes in Computer Science, vol 1304. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-63465-7_209

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  • DOI: https://doi.org/10.1007/3-540-63465-7_209

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-63465-2

  • Online ISBN: 978-3-540-69557-8

  • eBook Packages: Springer Book Archive

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