Abstract
Reconfiguration for fault tolerance is the process of excluding faulty processors from an array of interconnected processors and including spare processors to take their place. Reconfiguration Graph Grammar (RGG) is introduced as a model supporting the design and analysis of these reconfiguration algorithms. A formal description is given, as well as several theorems, with proofs, concerning the properties of RGG that make it well suited for modeling reconfiguration. An example RGG-based reconfiguration algorithm is described and demonstrated.
We believe that by using a model based on the theoretically sound framework of graph grammars, additional properties of reconfiguration for fault tolerance can be discovered.
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© 1996 Springer-Verlag Berlin Heidelberg
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Derk, M.D., DeBrunner, L.S. (1996). Reconfiguration Graph Grammar for massively parallel, fault tolerant computers. In: Cuny, J., Ehrig, H., Engels, G., Rozenberg, G. (eds) Graph Grammars and Their Application to Computer Science. Graph Grammars 1994. Lecture Notes in Computer Science, vol 1073. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-61228-9_87
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DOI: https://doi.org/10.1007/3-540-61228-9_87
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