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Unconstrained evolution and hard consequences

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Towards Evolvable Hardware

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 1062))

Abstract

Artificial evolution as a design methodology for hardware frees many of the simplifying constraints normally imposed to make design by humans tractable. However, this freedom comes at some cost, and a whole fresh set of issues must be considered. Standard genetic algorithms are not generally appropriate for hardware evolution when the number of components need not be predetermined. The use of simulations is problematic, and robustness in the presence of noise or hardware faults is important. We present theoretical arguments, and illustrate with a physical piece of hardware evolved in the real-world (‘intrinsically evolved’ hardware). A simple asynchronous digital circuit controls a real robot, using a minimal sensorimotor control system of 32 bits of RAM and a few flip-flops to co-ordinate sonar pulses and motor pulses with no further processing. This circuit is tolerant to single-stuck-at faults in the RAM. The methodology is applicable to many types of hardware, including Field-Programmable Gate Arrays (FPGA's).

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Eduardo Sanchez Marco Tomassini

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© 1996 Springer-Verlag Berlin Heidelberg

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Thompson, A., Harvey, I., Husbands, P. (1996). Unconstrained evolution and hard consequences. In: Sanchez, E., Tomassini, M. (eds) Towards Evolvable Hardware. Lecture Notes in Computer Science, vol 1062. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-61093-6_7

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  • DOI: https://doi.org/10.1007/3-540-61093-6_7

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-61093-9

  • Online ISBN: 978-3-540-49947-3

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