Abstract
Using a lower bound argument based on probabilistic communication complexity it will be shown that iterated multiplication of n-bit numbers modulo polylog (n)-bit integers cannot be done efficiently by depth two threshold circuits. As a consequence we obtain that for iterated multiplication of n-bit numbers, in contrast to multiplication, powering, and division, decomposition via Chinese Remaindering does not yield efficient depth 3 threshold circuits.
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© 1995 Springer-Verlag Berlin Heidelberg
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Krause, M. (1995). On realizing iterated multiplication by small depth threshold circuits. In: Mayr, E.W., Puech, C. (eds) STACS 95. STACS 1995. Lecture Notes in Computer Science, vol 900. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-59042-0_64
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DOI: https://doi.org/10.1007/3-540-59042-0_64
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