Abstract
Arctic is a 4x4 packet routing chip being developed for the *T multiprocessor. Arctic can be used to implement a variety of staged networks and will be used to implement a fat tree network for *T. Arctic meets the requirements of *T and of a wide class of systems. This paper discusses the key features of Arctic. These include its buffering scheme which enables very high utilization of network links and its test and control system which provides error detection, limited error handling, and in-circuit testability.
The research described in this paper was supported in part by the Advanced Research Projects Agency under Office of Naval Research contract N00014-92-J-1310.
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© 1994 Springer-Verlag Berlin Heidelberg
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Boughton, G.A. (1994). Arctic routing chip. In: Bolding, K., Snyder, L. (eds) Parallel Computer Routing and Communication. PCRCW 1994. Lecture Notes in Computer Science, vol 853. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-58429-3_46
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DOI: https://doi.org/10.1007/3-540-58429-3_46
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