Algebraic Coding 1993: Algebraic Coding pp 172-193 | Cite as

Detection and location of given sets of errors by nonbinary linear codes

  • Mark G. Karpovsky
  • Saeed M. Chaudhry
  • Lev B. Levitin
  • Claudio Moraga
Graphs and Codes
Part of the Lecture Notes in Computer Science book series (LNCS, volume 781)


The problem of constructing codes capable of detection and location of a given set of errors is considered. Lower and upper bounds on a number of redundant symbols for an arbitrary set of errors are derived. These codes can be used for error detection and identification of faulty processing elements in multiprocessor systems. To this end, new classes of codes for several types of error sets such as stars, trees and FFTs meshes are presented. The concepts of strong and weak diagnostics (SD and WD, respectively) are introduced and discussed.

Index Terms

Detection and location of a given set of errors diagnostic of multiprocessor systems or arrays error detection error location linear codes 


Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.


  1. [1]
    P. H. Bardell, W. H. McAnney, and J. Savir. Built-in Self Test for VLSI: Pseudorandom Techniques. Wiley Interscience, New York, NY, 1987.Google Scholar
  2. [2]
    K. E. Batcher. Design of a Massively Parallel Processor. IEEE Transaction on Computers, C-29:836–840, Sept. 1980.Google Scholar
  3. [3]
    J. Bently and H. T. Kung. A Tree Machine for Searching Problems. In International Conference on Parallel Processing, pages 257–266, 1979.Google Scholar
  4. [4]
    C. Berge. Graphs and Hypergraphs. North-Holland, New York, NY, 1973.Google Scholar
  5. [5]
    D. F. Elliott and K. R. Rao. Fast Transforms: Algorithms, Analyses, Applications. Academic Press, New York, NY, 1982.Google Scholar
  6. [6]
    T. Y. Feng. A Survey of Interconnection Networks. IEEE Computer, 14:960–965, 1981.Google Scholar
  7. [7]
    C. R. P. Hartmann. Decoding Beyond the BCH Bound. IEEE Transaction on Information Theory, pages 441–444, May 72.Google Scholar
  8. [8]
    J. P. Hayes et al. A Microprocessor-Based, Hypercube Supercomputer. IEEE Micro, 6:6–17, Oct. 1986.Google Scholar
  9. [9]
    W. D. Hillis. The Connection Machine. MIT Press, Cambridge, MA, 1985.Google Scholar
  10. [10]
    K. Hwang and F. A. Briggs. Computer Architecture and Parallel Processing. Academic Press, New York, NY, 1982.Google Scholar
  11. [11]
    M. G. Karpovsky. Weight Distributions of Translates, Covering Radius, and Perfect Codes Correcting Errors of Given Weights. IEEE Transaction on Information Theory, IT-27:462–472, July 1981.Google Scholar
  12. [12]
    M. G. Karpovsky and S. M. Chaudhry. Built-in Self Diagnostic by Space-Time Compression of Test Responses. In IEEE VLSI Test Symposium, pages 149–154, 1992.Google Scholar
  13. [13]
    M. G. Karpovsky, L. B. Levitin, and F. S. Vainstein. Identification of Faulty Processing Elements by Space-Time Compression of Test Responses. In International Test Conference, pages 638–647, 1990.Google Scholar
  14. [14]
    M. G. Karpovsky and V. D. Milman. On Subspace Contained In Subsets Of Finite Homogeneous Space. Discrete Mathematics, 22:273–280, 1978.Google Scholar
  15. [15]
    S. Y. Kung. VLSI Array Processors. Prentice-Hall, Englewood Cliffs, NJ, 1988.Google Scholar
  16. [16]
    F. J. MacWilliams and N. J. A. Sloane. The Theory of Error-Correcting Codes. North-Holland, New York, NY, 1977.Google Scholar
  17. [17]
    B. Masnick and J. Wolf. On Linear Unequal Error Protection Codes. IEEE Transaction on Information Theory, IT-3:600–607, Oct. 1967.Google Scholar
  18. [18]
    E. J. McCluskey. Built-in Self Test Techniques. IEEE Design and Test of Computers, pages 21–28, Apr. 1985.Google Scholar
  19. [19]
    F. P. Preparata and J. Vuillemin. The Cube-Connected Cycles: A Versatile Network for Parallel Computation. Communication of the ACM, 24:568–572, May 1981.Google Scholar
  20. [20]
    S. R. Reddy, K. K. Saluja, and M. G. Karpovsky. A Data Compression Technique for Test Responses. IEEE Transaction on Computers, C-38:1151–1156, Sept. 1988.Google Scholar
  21. [21]
    U. K. Sorger. A New Reed-Solomon Code Decoding Algorithm Based on Newton's Interpolation. IEEE Transaction on Information Theory, IT-39:358–365, Mar. 1993.Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 1994

Authors and Affiliations

  • Mark G. Karpovsky
    • 1
  • Saeed M. Chaudhry
    • 1
  • Lev B. Levitin
    • 1
  • Claudio Moraga
    • 2
  1. 1.Research Laboratory of Design and Testing of Computer Hardware Department of Electrical, Computer and Systems EngineeringBoston UniversityBostonUSA
  2. 2.Department of Computer ScienceUniversity of DortmundDortmund 50Federal Republic of Germany

Personalised recommendations