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Data structure and algorithms for new hardware technology

  • Yahiko Kambayashi
  • Hiroki Takakura
  • Shintaro Meki
Invited Talk
Part of the Lecture Notes in Computer Science book series (LNCS, volume 730)

Abstract

New applications and new hardware/software technology are major factors to drive database research to new directions. In this paper we will discuss effects of up-to-date hardware technology to data structure and database algorithms. Historically in database file organization, utilization of sequential access and clustering of data are two important techniques to improve processing efficiency. Flash memory, which is believed to replace conventional disks for mobile application etc., can sequentially access only small amount of data compared with disks, and data clustering will not contribute to improve system performance. On the other hand, recently developed high-speed RAM contains cache memory which contributes to speed-up sequential access. We may be able to utilize special-purpose memory to improve database performance, such as content addressable memory and dual-port RAM. Most research on improvement of database performance using hardware was to develop hardware for relational database operations. Advanced flexible logic chips such as FPGA(Field Programmable Gate Array) can realize a circuit consisting of over 10,000 gates and connections in the circuit can be changed during system operation by modifying the contents of control SRAMs. We may be able to improve system performance by using FPGAs to realize bottle-neck portions of the database software. Such techniques can be applied especially to active and real-time database systems. Pipe-line processing is a special case of parallel processing and recently pipe-line processors for workstations have been developed. Although pipe-line processing is rather restrictive, it can be combined with concurrency control mechanisms rather easily. Optimization for pipe-line processing is also simpler than that for parallel/distributed systems. Use of pipe-line processors for database operations is also an important topic.

Keywords

Field Programmable Gate Array Flash Memory Concurrency Control Acceleration Ratio Database Operation 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer-Verlag Berlin Heidelberg 1993

Authors and Affiliations

  • Yahiko Kambayashi
    • 1
  • Hiroki Takakura
    • 1
  • Shintaro Meki
    • 2
  1. 1.Faculty of EngineeringKyoto UniversityKyotoJapan
  2. 2.Faculty of Computer ScienceOkayama Prefecture UniversityOkayamaJapan

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