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A highly parallel FPGA-based machine and its formal verification

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Field-Programmable Gate Arrays: Architecture and Tools for Rapid Prototyping (FPL 1992)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 705))

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Abstract

The SPACE machine is introduced as a new type of computer architecture, capable of very fast simulation of highly concurrent systems. The machine is designed to be scalable, constructed from a vast array of boards. The decisions made in the the design of the board are discussed, and the actual hardware (based on an array of Field Programmable Gate Array chips) is described. It is shown that this machine can be programmed by translating a subset of the Occam language into asynchronous modules. Using the Circal process algebra, a new method of formally verifying asynchronous modules for these circuits is presented. This method allows bounded gate delays to be included in a two-level modelling mechanism.

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Herbert Grünbacher Reiner W. Hartenstein

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© 1993 Springer-Verlag Berlin Heidelberg

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Shaw, P., Milne, G. (1993). A highly parallel FPGA-based machine and its formal verification. In: Grünbacher, H., Hartenstein, R.W. (eds) Field-Programmable Gate Arrays: Architecture and Tools for Rapid Prototyping. FPL 1992. Lecture Notes in Computer Science, vol 705. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-57091-8_41

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  • DOI: https://doi.org/10.1007/3-540-57091-8_41

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-57091-2

  • Online ISBN: 978-3-540-47902-4

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