Abstract
The first PLDs based on sum-of-products arrays were PLAs and PALs. Both are special cases of the more general PML, a fed back NAND array. Some CPLDs take up the idea of the PML for product term expansion, others use various methods of product term allocation. The multiple array architecture is the way to increase the pin count of PLDs. Their logic design requires to partition the logic in consideration of the interconnect matrix of the PLD. Limited interconnect is the reason for an additional placement problem.
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© 1993 Springer-Verlag Berlin Heidelberg
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Biehl, G. (1993). Overview of complex array-based PLDs. In: Grünbacher, H., Hartenstein, R.W. (eds) Field-Programmable Gate Arrays: Architecture and Tools for Rapid Prototyping. FPL 1992. Lecture Notes in Computer Science, vol 705. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-57091-8_24
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DOI: https://doi.org/10.1007/3-540-57091-8_24
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Online ISBN: 978-3-540-47902-4
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