Abstract
The family of concurrent logic programming languages has proved to be a great asset to programmers seeking to quickly construct efficient programs for highly parallel shared-memory machines. If these languages are to be implemented efficiently for other architectures, however, language-specific compile-time analysis techniques must be improved. This work describes a technique and implementation of “sequentialization” (compile-time ordering of body goals) based on automatic “mode analysis” (identification of input and output parameters) for a large subset of concurrent logic programs: feedback-free, fully-moded, flat-guarded programs. We present preliminary performance results from an FGHC-to-C compiler, utilizing these techniques, which produces very fast code.
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Massey, B.C., Tick, E. (1993). Sequentialization of parallel logic programs with mode analysis. In: Voronkov, A. (eds) Logic Programming and Automated Reasoning. LPAR 1993. Lecture Notes in Computer Science, vol 698. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-56944-8_54
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DOI: https://doi.org/10.1007/3-540-56944-8_54
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