Analysis of the TMS320C40 communication channels using timed Petri Nets

  • David A. Hartley
  • David M. Harvey
Project Papers
Part of the Lecture Notes in Computer Science book series (LNCS, volume 691)


The Texas Instruments' TMS320C40 Digital Signal Processor's communication ports and their associated DMA channels have been modelled using Timed Petri Nets. The Petri Net implementation is discussed, and the performance of the communication ports/DMA channels are evaluated. Analysis of the simulation results indicate that the single DMA bus provides insufficient bandwidth to drive the communication ports at maximum speed. During split mode operation the requirement to exchange the bus token reduces the communication bandwidth.


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Copyright information

© Springer-Verlag Berlin Heidelberg 1993

Authors and Affiliations

  • David A. Hartley
    • 1
  • David M. Harvey
    • 1
  1. 1.Coherent and Electro-Optics Research GroupLiverpool John Moores UniversityLiverpoolUK

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