Abstract
Commercial medium-grain multicomputers aimed at ultra-supercomputer performance are pursuing a less profitable scaling track than fine-grain multicomputers. The Caltech Mosaic C is an experimental, fine-grain multicomputer that employs single-chip nodes and advanced packaging technology to demonstrate the performance/cost advantages of the fine-grain-multicomputer architecture. Each Mosaic node includes 64KB of memory, an 11MIPS processor, a packet interface, and a router. The nodes are tied together with a 60MBytes/s, two-dimensional, routing-mesh network. The compilation-based programming system allows fine-grain, reactive-process, message-passing programs to be expressed in an extension of C++, and the runtime system performs automatic, distributed management of system resources. Mosaic components and programming tools have already been used by another project to implement the 400Mbits/s ATOMIC local-area network, and a 16K-node machine is under construction at Caltech to explore the programmability and application span of the architecture for large-scale computing problems.
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References
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© 1992 Springer-Verlag Berlin Heidelberg
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Seitz, C.L. (1992). Mosaic C: An experimental fine-grain multicomputer. In: Bensoussan, A., Verjus, J.P. (eds) Future Tendencies in Computer Science, Control and Applied Mathematics. INRIA 1992. Lecture Notes in Computer Science, vol 653. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-56320-2_53
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DOI: https://doi.org/10.1007/3-540-56320-2_53
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