# On the performance of networks with multiple busses

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## Abstract

- 1)
To which extend can the computation power of parallel processor networks be increased by using busses, i.e. by providing broadcast facilities in the networks?

- 2)
To which extend can shared memory cells of PRAMs be replaced by links? (For this question, note that a shared memory cell can be viewed as a global bus.)

We show upper and lower bounds for computing associative operations such as Addition or Maximum on networks with busses. Our bounds are based on simple graph theoretical properties of the networks.

As to question 1, these results demonstrate that busses can increase the performance of networks with large diameter. For example, computing MAXIMUM on a *d*-dimensional mesh with *N* processors needs time \(\Theta (\sqrt[d]{N})\) without busses, but only time \(\Theta \left( {\sqrt[{d + 1}]{{\tfrac{N}{m}}} + \log \log N} \right)\) with *m* CRCW-busses.

As to question 2, these results demonstrate that the storage requirement of optimal PRAM algorithms can be reduced by adding a network with small diameter. For example, an *N*-processor CRCW-PRAM with an underlying binary tree network needs \(m \approx \frac{N}{{poly\log N}}\) (i.e. m with log *m* = log *N* - θ(log log *N*)) shared memory cells to compute Maximum in optimal time θ(log log *N*) whereas, without links, θ(*N*) shared memory cells are necessary.

We further consider a very simple, easy to realize class of networks with busses, namely planar networks with planar busses. We describe a planar system of EREW-busses for square meshes on which associative operations can be performed in optimal time θ(log *N*) — compared to θ(√N) without busses. On the other hand, we prove that Sorting on planar networks cannot be sped up by the use of additional planar busses.

## Keywords

Planar Graph Planar Network Living Variable Associative Operation Parallel Random Access Machine## Preview

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## References

- [Agg86]A. Aggarwal. Optimal bounds for finding maximum on array of processors with
*k*global buses.*IEEE Trans. on Comp.*, C-35:62–64, Jan. 1986.Google Scholar - [Bok84]S. H. Bokhari. Finding maximum on an array processor with a global bus.
*IEEE Trans. on Comp.*, C-33:133–139, Feb. 1984.Google Scholar - [BP89]A. Bar-Noy and D. Peleg. Square meshes are not always optimal. In
*ACM Symp. on Parallel Algorithms and Architectures*, pages 138–147, 1989.Google Scholar - [CDR86]S. Cook, C. Dwork, and R. Reischuk. Upper and lower bounds for parallel random access machines without simultaneous writes.
*SIAM Journal on Comp.*, 15(1):87–97, 1986.Google Scholar - [FMW87]F. Fich, F. Meyer auf der Heide, and A. Wigderson. Lower bounds for parallel random access machines with unbounded shared memory. In F. P. Preparata, editor,
*Advances in Computing Research*, volume 4 of*Parallel and Distributed Computing*, 1987.Google Scholar - [Meh84]K. Mehlhorn.
*Graph Algorithms and NP-Completeness*, volume 2 of*Data Structures and Algorithms. EATCS Monographs on Theoretical Computer Science*. Springer Berlin, 1984.Google Scholar - [MW87]F. Meyer auf der Heide and A. Wigderson. The complexity of parallel sorting.
*SIAM Journal on Comp.*, 16(1):100–107, 1987.Google Scholar - [Pha90]H. T. Pham. Fundamental algorithms for networks with busses (in German).
*Diploma Thesis, Universität Dortmund*, Dec. 1990.Google Scholar - [SS89]I. D. Scherson and S. Sen. Parallel sorting in two-dimensional VLSI models of computation.
*IEEE Trans. on Comp.*, 38:238–249, Feb. 1989.Google Scholar - [Sto86]Q. F. Stout. Meshes with multiple buses. In 27th
*IEEE Symp. on Foundations of Comp. Science*, pages 264–273, 1986.Google Scholar - [SV81]Y. Shiloach and U. Vishkin. Finding the maximum, merging, and sorting in a parallel computation model.
*Journal of Algorithms*, 2:88–102, 1981.Google Scholar - [Weg87]I. Wegener.
*The Complexity of Boolean Functions*. Series in Computer Sience. Wiley-Teubner, 1987.Google Scholar