Optimal instruction scheduling using constraint logic programming

  • M. Anton Ertl
  • Andreas Krall
Session: Compiler Construction I
Part of the Lecture Notes in Computer Science book series (LNCS, volume 528)


Instruction scheduling is essential for the efficient operation of today's and tomorrow's processors. It can be stated easily and declaratively as a logic program. Consistency techniques embedded in logic programming enable the efficient solution of this problem.

This paper describes an instruction scheduling program for the Motorola 88100 RISC processor, which minimizes the number of pipeline stalls. The scheduler is written in the constraint logic programming language ARISTO and uses a declarative model of the processor to generate an optimal schedule. The model uses lists of domain variables to represent the pipeline stages and describes the dependencies between instructions by constraints in order to ensure correct scheduling. Although optimal instruction scheduling is NP-complete, the scheduler can be applied to real programs because of the speed gained through consistency techniques.


Logic Program Logic Programming Basic Block Pipeline Stage Register Allocation 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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Copyright information

© Springer-Verlag Berlin Heidelberg 1991

Authors and Affiliations

  • M. Anton Ertl
    • 1
  • Andreas Krall
    • 2
  1. 1.DMS Decision Management Systems Ges.m.b.H.Wien
  2. 2.Institut für ComputersprachenTechnische Universität WienWien

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