Abstract
This paper introduces a novel (non-von Neumann) paradigm of parallel computation supporting a much more efficient implementation of parallel algorithms than known from von Neumann computers. Acceleration factors of up to more than 2000 have been obtained experimentally on the MoM architecture for a number of important applications — although using a processor hardware being more simple than that of a single RISC microprocessor. The most important hardware features of xputer will be briefly introduced. By means of 2 simple algorithm examples the programming paradigm and its flexibility will be illustrated.
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Literature
A. Ast, R. Hartenstein, A. Hirschbiel, M. Riedmüller, K. Schmidt, M. Weber: Using Xputers as Inexpensinve Universal Accelerators in Digital Signal Processing; International Conference on New Trends in Signal Processing, Communication and Control, Ankara, Turkey, 1990, North Holland 1990
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A. Hirschbiel: (Ph. D. thesis), Universitaet Kaiserslautern, in preparation for October 1990
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R. W. Hartenstein, A. G. Hirschbiel, M. Weber: The Machine Paradigm of Xputers: and its Application to Digital Signal Processing Acceleration; ICPP-90 International Conference on Parallel Processing, 1990; to be published by IEEE Press, Washington, D.C., 1990
M.Weber: (Ph. D. thesis), Universitaet Kaiserslautern, in preparation for October 1990
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© 1990 Springer-Verlag Berlin Heidelberg
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Hartenstein, R.W., Hirschbiel, A.G., Weber, M. (1990). A novel paradigm of parallel computation and its use to implement simple high performance hardware. In: Burkhart, H. (eds) CONPAR 90 — VAPP IV. VAPP CONPAR 1990 1990. Lecture Notes in Computer Science, vol 457. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-53065-7_87
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DOI: https://doi.org/10.1007/3-540-53065-7_87
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