# Structured NC

- 658 Downloads

## Abstract

We introduce the class Structured *NC* (or *SNC* for short), consisting of all problems that can be solved by means of “structured” *NC*-circuits. A structured circuit is a circuit in which the gates are organized in a number of layers, each with the same number of gates and the same connections between gates in a layer. We will distinguish several subclasses of *SNC* depending on the depth of the circuits and the fan-in and fan-out of the gates. Relations among these subclasses and between these subclasses and *NC* and *AC* will be derived and we will show how to transform circuits from one class into equivalent circuits in other classes. Furthermore for some problems we present structured *NC*-circuits having fan-in as well as fan-out≤2; for Parallel Prefix Computation and Addition of *n*-bit numbers these circuits are of depth *O*(log *n*) with only *O*(*n*) gates in a layer, which is optimal for structured circuits. For Multiplication we will consider three methods and derive structured *NC*-circuits for them.

## Keywords

Structure Circuit Input Gate Original Circuit Parallel Prefix Dummy Gate## Preview

Unable to display preview. Download preview PDF.

## References

- [AhHoUl]Aho, A.V., J.E. Hopcroft and J.D. Ullman,
*The Design and Analysis of Computer Algorithms*, Addison-Wesley, Reading, MA, 1974.Google Scholar - [Bu]Buss, S.R., The boolean formala value problem is in ALOGTIME,
*Proc 19th Annual ACM Symp. on Theory of Computing*, 1987, pp.123–131.Google Scholar - [ChKoSt]Chandra, A.K., D.C. Kozen, L.J. Stockmeyer, Alternation,
*JACM*28 (1981), pp.114–133.CrossRefGoogle Scholar - [Co1]Cook, S.A., Towards a complexity theory of synchronous parallel computation,
*Enseign. Math.*27 (1981), pp.99–124.Google Scholar - [Co2]Cook, S.A., A taxonomy of problems with fast parallel algorithms,
*Inform. and Control*64(1985), pp.2–22.CrossRefGoogle Scholar - [FuSaSi]Furst, M., J.B. Saxe and M. Sipser, Parity, circuits and the polynomial time hierarchy,
*Math. Systems Theory*17(1984), pp.13–28.CrossRefGoogle Scholar - [KaRa]Karp, R.M. and V.L. Ramachandran, A survey of parallel algorithms for shared-memory machines, in: J. van Leeuwen (Ed.),
*Handbook of Theoretical Computer Science*, North-Holland Publ. Comp., Amsterdam (to appear).Google Scholar - [LaFi]Ladner, R.E. and M.J. Fischer, Parallel prefix computation,
*JACM*27 (1980), pp.831–838.Google Scholar - [MePr]Mehlhorn, K. and F.P. Preparata, Area-time optimal VLSI integer multiplier with minimum computation time,
*IC*5(1983), pp.137–156.Google Scholar - [Of]Ofman, Y., On the algorithmic complexity of discrete functions,
*Sov. Phys. Dokl.*7 (1963), pp.589–591.Google Scholar - [Ru1]Ruzzo, W.L., Tree-size bounded alternation,
*J. Comp. Syst. Sci.*21 (1980), pp.218–235.Google Scholar - [Ru2]Ruzzo, W.L., On uniform circuit complexity,
*J. Comp. Syst. Sci*22 (1981), pp.365–383.Google Scholar - [Sa]Savage, J.E.,
*The Complexity of Computing*, Wiley, New York, 1976.Google Scholar - [ScLe]Scholten, B. and J. van Leeuwen, Structured NC,
*Techn. Rep. RUU-CS-89-6*, Dept. of Computer Science, University of Utrecht, Utrecht, 1989.Google Scholar - [ScSt]Schönhage, A. and V. Strassen, Schnelle Multiplikation grosser Zahlen,
*Computing*7(1971), pp.281–292.Google Scholar - [Wa]Wallace, C.S., A suggestion for a fast multiplier,
*IEEE Trans. Comp.*EC-13(1964), pp.14–17.Google Scholar - [We]Wegener, I.,
*The Complexity of Boolean Functions*, Wiley-Teubner, Stuttgart, 1987.Google Scholar