Abstract
We present an optimal NC algorithm for 2-layer channel routing of VLSI designs. Our routing algorithm achieves channel density and runs in O(logn) time using O(n) processors on an EREW P-RAM. The routing algorithm is a parallel version of the widely used Left-Edge Algorithm. It can be used to solve the maximum clique and the minimum coloring problem for interval graphs and the maximum independent set problem for co-interval graphs with optimal processor-time bounds. We give an optimizing extension to our algorithm that resolves column conflicts under certain weak conditions and runs in polylog time. The routing algorithm can easily be implemented on a multi-processor shared-memory machine so our solution has considerable practical value.
This work was supported in part by the Semiconductor Research Corporation under contract 86-07-84, the National Science Foundation under Grant DCR 83-06812, the Office of Naval Research under contract N00014-83-k-0146 and DARPA Order No. 4786.
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Savage, J.E., Wloka, M.G. (1989). A parallel algorithm for channel routing. In: van Leeuwen, J. (eds) Graph-Theoretic Concepts in Computer Science. WG 1988. Lecture Notes in Computer Science, vol 344. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-50728-0_52
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DOI: https://doi.org/10.1007/3-540-50728-0_52
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