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VLSI arrays implementing parallel line-drawing algorithms

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Parcella '88 (Parcella 1988)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 342))

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Abstract

After a short description of the problems encountered in graphic systems concerning the image memory, the first part of this paper describes several algorithms which are easily parallelizable. The second part shows possible VLSI arrays implementing the above mentioned algorithms and area and time estimations.

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References

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Author information

Authors and Affiliations

  1. Department of Control and Computer Science, Polytechnical Institute of Bucharest, Splaiul Independentei Nr. 313, sector 6, 77206, Bucharest, Romania

    Valeriu Beiu

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  1. Valeriu Beiu
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Gottfried Wolf Tamáas Legendi Udo Schendel

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© 1989 Springer-Verlag Berlin Heidelberg

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Beiu, V. (1989). VLSI arrays implementing parallel line-drawing algorithms. In: Wolf, G., Legendi, T., Schendel, U. (eds) Parcella '88. Parcella 1988. Lecture Notes in Computer Science, vol 342. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-50647-0_114

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  • DOI: https://doi.org/10.1007/3-540-50647-0_114

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-50647-8

  • Online ISBN: 978-3-540-46062-6

  • eBook Packages: Springer Book Archive

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