Abstract
Despite more than a decade of experience with the use of standardized benchmark circuits, meaningful comparisons of EDA algorithms remain elusive. In this paper, we introduce a new methodology for characterizing the performance of Binary Decision Diagram (BDD) software. Our method involves the synthesis of large equivalence classes of functionally perturbed circuits, based on a known reference circuit.We demonstrate that such classes induce controllable distributions of BDD algorithm performance, which provide the foundation for statistically significant comparison of different algorithms.
This research has been supported by contracts from the Semiconductor Research Corporation (94-DJ-553), SEMATECH (94-DJ-800), DARPA/ARO (P-3316-EL/DAAH04-94-G-2080), and (DAAG55-97-1-0345), and a grant from Semiconductor Research Corporation.
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Harlow, J.E., Brglez, F. (1998). Design of Experiments for Evaluation of BDD Packages Using Controlled Circuit Mutations. In: Gopalakrishnan, G., Windley, P. (eds) Formal Methods in Computer-Aided Design. FMCAD 1998. Lecture Notes in Computer Science, vol 1522. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-49519-3_6
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DOI: https://doi.org/10.1007/3-540-49519-3_6
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