System on Chip Specification and Design Languages Standardization

  • Jean Mermet
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 1622)


This paper is amied at summarizing the present international standardization activity in the domain of electronic systems’ design languages. This activity is the ultimate evolution of the development of Hardware Description Languages, a process in which the author has been involved since the mid sixties.


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  1. 1.
    J.R. ABrial «The B-book. Assigning programs to meanings», Cambridge university press, 1996.Google Scholar
  2. 2.
    M. Barbacci, D. Borrione, D. Dietmeyer, F. Hill, R. Piloty, P. Skelly: «CONLAN Report», Lect. notes in Computer Science No 151, Springer 00BBerlag, 1983Google Scholar
  3. 3.
    David L. Barton «Systems Level Design Section of the Industry Standards Roadmap» The systems Level Description Language CommitteeGoogle Scholar
  4. 4.
    G.V. Bochman, Specification Languages for Communication Protocols, Proceedings of the Confernece on Hardware Description Languages, April 1993Google Scholar
  5. 5.
    D. Biorrione: «CASCADE», in «Fundamentals and Standards in Hardware Description Languages» KLUWER ACADEMIC, (1993).Google Scholar
  6. 6.
    R.T. Boute «Fundamentals of Hardware Description Languages and Declarative Languages» in «Fundamentals and Standars in Hardware Description Languages» KLUWER ACADEMIC, (1993)Google Scholar
  7. 7.
    R. Braek, SDL Basics, S intef DelabGoogle Scholar
  8. 8.
    K. Buchenrieder, A. Pyteel and C. Veith, Mapping StateCharts Models onto an FPGA Based ASIP Architecture, Proc. of EuroDAC with Euro-VHDL, September 1996Google Scholar
  9. 9.
    «CONLAN: a short review and critical comparison with VHDL» IEEE Design & Test of computers. Sept 1992Google Scholar
  10. 10.
    J.M. Daveau, G. Fernandex Marchioro, C. Alberto Valderrama and A. Jerraya, VHDL generation from SDL specifications, IFIP 1997. Chapman & HallGoogle Scholar
  11. 11.
    Falkoff, A.D., Iverson, K.E., Sussenguth, E.H.: “Formal description of system/360” IBM sys. J. vol. 3, pp 198–262, 1964.CrossRefGoogle Scholar
  12. 12.
    W. Glunz, T. Kruse, T. Rossel and D. Monjeau, Integrating SDL and VHDL for System Level Specification, Proceedings of the Conference on Hardware Description Languages, April 1993Google Scholar
  13. 13.
    D. Harel: Statecharts: A visual formalism for com-plex systems. Science of Computer Programming, 8, 1987Google Scholar
  14. 14.
    A. Jerraya, J. Mermeteditors. “System level synthesis” KLUWER ACADEMIC. Spring 1999.Google Scholar
  15. 15.
    E. Lee and A. Sangiovanni-Vincentelli, A Framework For Comparing Models Of Computation, IEEE Transactions on CAD, September 1998.Google Scholar
  16. 16.
    Modelica Version 1.1-December 1998, Modelica Tutorial and Design Rationale, (HTML format)(Portable Document Format), updated (Modelica 1.1)Google Scholar
  17. 17.
    O. Pulkkinen and K. Krönlof, Integration of SDL and VHDL for High Level Digital Design, Proc. of EuroDAC with Euro-VHDL, September 1992.Google Scholar
  18. 18.
    Franz J. Ramming, «System Level Design», in «Fundamentals and Standards in Hardware Description Languges» KLUWER, (1993)Google Scholar
  19. 19.
    A. Sarma, Intro. to SDL-92, EURESCOM, GGoogle Scholar
  20. 20.
    VHDL modeling terminology and taxonomy, RASSP doc, Sept 9, 1996Google Scholar
  21. 21.
    E. Villar, Berrojo L, Sanchez P: «High-level synthesis and simulation with VHDL», Proc. of 2nd EuroVHDL Conf, Sockholm, Sept. 8–11, 1991Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 1999

Authors and Affiliations

  • Jean Mermet
    • 1
  1. 1.ECSI & Laboratoire TIMAGrenobleFrance

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