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A Systematic Incrementalization Technique and Its Application to Hardware Design

  • Steven D. Johnson
  • Yanhong A. Liu
  • Yuchen Zhang
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 1703)

Abstract

A transformation method based on incrementalization and value caching, generalizes a broad family of loop refinement techniques. This method and CACHET, an interactive tool supporting it, are presented. Though highly structured and automatable, better results are obtained with intelligent interaction, which provides insight and proofs involving term equality. Significant performance improvements are obtained in many representative program classes, including iterative schemes that characterize Today’s hardware specifications. Incrementalization is illustrated by the derivation of a hardware-efficient nonrestoring square-root algorithm.

Keywords and Phrases

Formal methods hardware verification design derivation formal synthesis transformational programming floating point operations 

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Copyright information

© Springer-Verlag Berlin Heidelberg 1999

Authors and Affiliations

  • Steven D. Johnson
    • 1
  • Yanhong A. Liu
    • 2
  • Yuchen Zhang
    • 3
  1. 1.Computer Science DepartmentIndiana UniversityUSA
  2. 2.Indiana UniversityUSA
  3. 3.Indiana UniversityUSA

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