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Results of the Verification of a Complex Pipelined Machine Model

  • Jun Sawada
  • Warren A. HuntJr.
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 1703)

Abstract

Using a theorem prover, we have verified a microprocessor design, FM9801. We define our correctness criterion for processors with speculative execution and interrupts. Our verification approach defines an invariant on an intermediate abstraction that records the history of instructions. We verified the invariant first, and then proved the correctness criterion. We found several bugs during the verification process.

Keywords

Correctness Criterion FIFO Queue Speculative Execution Branch Prediction Branch Instruction 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

References

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    Jun Sawada and Warren A. Hunt, Jr. Verification of FM9801: Out-of-order processor with speculative execution and exceptions that may execute self modifying code. Unpublished Report. Personal contact: sawada@cs.utexas.edu.Google Scholar
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Copyright information

© Springer-Verlag Berlin Heidelberg 1999

Authors and Affiliations

  • Jun Sawada
    • 1
  • Warren A. HuntJr.
    • 2
  1. 1.Department of Computer SciencesUniversity of Texas atAustinUSA
  2. 2.IBM Austin Research LaboratoryUSA

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