Abstract
Reconfigurable Computing (RC) has already been proved as a cost-efficient solution for rapid prototyping and some low-volume applications. Today, RC also gains importance in the context of embedded systems. However, mature and fully developed reconfigurable logic solutions for such systems are still missing. The primary reasons for this are the intrinsic cost of reconfigurable logic, and dedicated process technologies that reconfigurable designs are usually based on. In this paper, we present a novel reconfigurable logic core which addresses these issues. A logic cell architecture of the core has been tuned to a single application domain only (application-specific kernels in DSP applications). This allowed a reduction of the required amount of routingre sources by 28% compared with a commercial FPGA architecture. The core has been implemented in a standard CMOS 0.13μm process technology.
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Leijten-Nowak, K., van Meerbergen, J.L. (2002). Embedded Reconfigurable Logic Core for DSP Applications. In: Glesner, M., Zipf, P., Renovell, M. (eds) Field-Programmable Logic and Applications: Reconfigurable Computing Is Going Mainstream. FPL 2002. Lecture Notes in Computer Science, vol 2438. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-46117-5_11
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DOI: https://doi.org/10.1007/3-540-46117-5_11
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