A Pipelined Hardware Implementation of Genetic Programming Using FPGAs and Handel-C

  • Peter Martin
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 2278)


A complete Genetic Programming (GP) system implemented in a single FPGA is described in this paper. The GP system is capable of solving problems that require large populations and by using parallel fitness evaluations can solve problems in a much shorter time that a conventional GP system in software. A high level language to hardware compilation system called Handel-C is used for implementation.


Genetic Programming Clock Cycle Field Programmable Gate Array High Level Language Parallel Evaluation 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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  1. 2.
    T. Fogarty, J. Miller, and P. Thompson. Evolving Digital Logic Circuits on Xilinx 6000 Family FPGAs. In P. Chawdhry, R. Roy, and R. Pant, editor, Soft Computing in Engineering Design and Manufacturing, pages 299–305. Springer-Verlag, 1998.Google Scholar
  2. 3.
    P. Graham and B. Nelson. Genetic Algorithms In Software and In hardware-A Performance Analysis Of Workstation and Custom Computing Machine Implementations. InK. Pocek and J. Arnold, editor, Proceedings of the Fourth IEEE Symposium of FPGAs for Custom Computing Machines., pages 216–225, Napa Valley,Califormia, Apr. 1996. IEEE Computer Society Press.Google Scholar
  3. 4.
    M. Heywood and A. Zincir-Heywood. Register based genetic programming on FPGA computing platforms. In R. Poli, W. Banzhaf, W. Langdon, J. Miller, P. Nordin, and T. Fogarty, editor, Genetic programming, proceedings of eurogp’2000, volume 1802 of LNCS, pages 44–59, Edinburgh, 15–16 April 2000.Springer-Verlag.Google Scholar
  4. 5.
    J. Koza. Genetic programming: on the programming of computers by means of natural selection. MIT Press, Cambridge, MA, USA, 1992.zbMATHGoogle Scholar
  5. 6.
    J. Koza, F. Bennett III, J. Hutchings, S. Bade, M. Keane, and D. Andre. Rapidly reconfigurable field-programmable gate arrays for accelerating fitness evaluation in genetic programming. In J. Koza, editor, Late breaking papers at the 1997 genetic programming conference, pages 121–131, Stanford University, CA, USA, 13–16 July 1997. Stanford Bookstore.Google Scholar
  6. 7.
    W. Langdon and R. Poli. Why ants are hard. InJ. Koza, W. Banzhaf, K. Chellapilla, K. Deb, M. Dorigo, D. Fogel, M. Garzon, D. Goldberg, H. Iba, and R. Riolo,editors, Genetic programming 1998: proceedings of the third annual conference, pages 193–201, University of Wisconsin, Madison, Wisconsin, USA, 22–25 July 1998. Morgan Kaufmann.Google Scholar
  7. 8.
    D. Levi and S. Guccione. Genetic FPGA: Evolving Stable Circuits on Mainstream FPGA Devices. InA. Stoica, D. Keymeulen, and J. Lohn, editor, Proc. of the First NASA/DoD Workshop on Evolvable Hardware, pages 12–17. IEEE Computer Society, July 1999.Google Scholar
  8. 9.
    P. Martin. A Hardware Implementation of a Genetic Programming System using FPGAs and Handel-C. Genetic Programming and Evolvable Machines, 2(4):317–343, 2001.zbMATHCrossRefGoogle Scholar
  9. 10.
    J. Miller and P. Thomson. Cartesian genetic programming. In R. Poli, W. Banzhaf, W. Langdon, J. Miller, P. Nordin, and T. Fogarty, editor, Genetic programming, proceedings of eurogp’2000, volume 1802 of LNCS, pages 121–132, Edinburgh, 15–16 April 2000. Springer-Verlag.Google Scholar
  10. 11.
    P. Nordin and W. Banzhaf. Evolving turing-complete programs for a register machine with self-modifying code. InL. Eshelman, editor, Genetic algorithms: proceedings of the sixth international conference (icga95), pages 318–325, Pittsburgh, PA, USA, 15–19 July 1995. Morgan Kaufmann.Google Scholar
  11. 12.
    S. Perkins, R. Porter, and N. Harvey. Everything on the chip: a hardware based self-contained spatially-structured genetic algorithm for signal processing. In J. Miller, A. Thompson, P. Thomson, and T. Fogarty, editor, Proc. Of the 3rd int. Conf. on Evolvable Systems: From Biology to Hardware (ICES 2000), volume 1801 of Lecture Notes in Computer Science, pages 165–174, Edinburgh, UK, 2000. Springer-Verlag.CrossRefGoogle Scholar
  12. 13.
    D. Scott, S. Seth, and A. Samal. A Hardware Engine for Genetic Algorithms. Technical Report UNL-CSE-97-001, University of Nebraska-Lincon, Dept Computer Science and Engineering, University of Nebraska-Lincon., 4 July 1997.Google Scholar
  13. 14.
    B. Shackleford, G. Snider, R. Carter, E. Okushi, M. Yasuda, K. Seo, and H. Yasuura. A High Performance, Pipelined, FPGA-Based Genetic Algorithm Machine.Genetic Programming and Evolvable Machines, 2(1):33–60, Mar. 20zbMATHCrossRefGoogle Scholar
  14. 15.
    A. Thompson. Silicon evolution. In J. Koza, D. Goldberg, D. Fogel, and R. Riolo,editor, Genetic programm In 1996: proceedings of the first annual conference, pages 444–452, Stanford University, CA, USA, 28–31 July 1996. MIT Press.Google Scholar
  15. 16.
    G. Tufte and P. Haddow. Prototyping a GA pipeline for complete hardware evolution.In A. Stoica, D. Keymeulen, and J. Lohn, editor, Proc. of the First NASA/DoD Workshop on Evolvable Hardware, pages 18–25. IEEE Computer Society, July 1999.Google Scholar
  16. 17.
    Y. Yamaguchi, A. Miyashita, T. Marutama, and T. Hoshino. A Co-processor System with a Virtex FPGA for Evolutionary Computation. InR. Hartenstein and H. Grunbacher, editor, 10th International Conference on Field Programmable Logic and Applications (FPL2000), volume 1896 of Lecture notes in Computer Science, pages 240–249. Springer-Verlag, Aug. 2000.Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2002

Authors and Affiliations

  • Peter Martin
    • 1
  1. 1.Department of Computer ScienceUniversity of EssexColchesterUK

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