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Translating Imperative Affine Nested Loop Programs into Process Networks

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Embedded Processor Design Challenges (SAMOS 2001)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 2268))

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Abstract

Specification of signal processing applications in terms of executable process networks is indispensable when these applications are to be mapped on parallel running processing units. The specifications are typically not given as process networks but as imperative programs. Translating imperative programs to process networks is thus necessary. This can be done, be it that some restrictions on the imperative programs have to be imposed: they have to be affine nested loop programs.

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© 2002 Springer-Verlag Berlin Heidelberg

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Deprettere, E.F., Rijpkema, E., Kienhuis, B. (2002). Translating Imperative Affine Nested Loop Programs into Process Networks. In: Deprettere, E.F., Teich, J., Vassiliadis, S. (eds) Embedded Processor Design Challenges. SAMOS 2001. Lecture Notes in Computer Science, vol 2268. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-45874-3_6

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  • DOI: https://doi.org/10.1007/3-540-45874-3_6

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