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Embedded Systems: Challenges in Specification and Verification

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Abstract

In this position paper, we mention some of the challenges in specification and verification which are raised by the emerging discipline of embedded systems. The main proposition of the paper is that a feasible solution to the problem of effective, reliable, and dependable construction of embedded systems can be provided by a seamless development process based on a formal specification of the required system, which proceeds by the activities of verification and analysis of the specification at very early stages of the design, and then followed by automatic code generation, preceded if necessary by code distribution and allocation.

As a prototype example of such a development process, we quote some experiences from the Sacres project and its follow-up Safeair. Necessary extensions to these preliminary experiments are discussed and evaluated.

This research was supported in part by the John von Newman Minerva Center for the Verification of Reactive Systems.

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Pnueli, A. (2002). Embedded Systems: Challenges in Specification and Verification. In: Sangiovanni-Vincentelli, A., Sifakis, J. (eds) Embedded Software. EMSOFT 2002. Lecture Notes in Computer Science, vol 2491. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-45828-X_1

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  • DOI: https://doi.org/10.1007/3-540-45828-X_1

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