Abstract
This paper presents a new architecture of Analog-to-Digital Converter (ADC) for low-power applications. The converter is a tracking circuit without any global clock, based on an asynchronous design. Samples conversion is only triggered by the analog input signal amplitude variations, hence an irregular sampling of it. System simulations demonstrate that a significative reduction of the circuit activity can be achieved with it. Moreover, such a converter has been designed with 6-bit resolution, using a 0.18-μm, 1.8-V standard CMOS technology from ST-Microelectronics. Electrical simulations show that, the asynchronous converter has an average power dissipation of only 1.9mW in the worst case, with a sample conversion time of 37.9ns, and an important noise reduction is achieved, compared to its synchronous counterparts.
This is a preview of subscription content, log in via an institution.
Buying options
Tax calculation will be finalised at checkout
Purchases are for personal use only
Learn about institutional subscriptionsPreview
Unable to display preview. Download preview PDF.
References
Jespers, P. G. A.: “Integrated Converters, D to A and A to D Architectures, Analysis and Simulation”, Oxford University Press, 2001.
Walden, R. H.: “Analog-to-Digital Converter Survey and Analysis”, IEEE Journal on Selected Areas in Communications, Vol. 17, n° 4, pp. 539–550, April 1999.
Renaudin, M.: “Asynchronous Circuits and Systems: a Promising Design Alternative”, Journal of Microelectronic Engineering, Vol. 54, pp. 133–149, 2000.
Piguet, C., Renaudin, M., Omnes, T.: “Special Session on Low-power Systems on Chips”, Design Automation and Test in Europe (DATE), Munich, Germany, March 13–16, 2001, pp. 488–494.
Kinniment, D., Yakovlev A., Gao B.: “Synchronous and Asynchronous A-D Conversion”, IEEE Transactions on VLSI Systems, Vol. 8, n° 2, pp. 217–220, April 2000.
Kinniment, D.J., Yakovlev, A.V.: “Low Power, Low Noise Micropipelined Flash A-D Converter”, IEE Proceedings on Circuits Devices Systems, Vol. 146, n° 5, pp. 263–267, October 1999.
Conti, M., Orcioni, S., Turchetti, C., Biagetti, G.: “A Current Mode Multistable Memory Using Asynchronous Successive Approximation A/D Converter”, IEEE International Conference on Electronics, Circuits and Systems, Cyprus, September 1999.
Mark, J.W., Todd, T.D.: “A Nonuniform Sampling Approach to Data Compression”, IEEE Transactions on Communications, Vol. COM-29, n° 4, pp. 24–32, January 1981.
Sayiner, N., Sorensen, H.V., Viswanathan, T.R.: “A Level-Crossing Sampling Scheme for A/D Conversion”, IEEE Transactions on Circuits and Systems II, Vol. 43, n° 4, pp. 335–339, April 1996.
Sutherland, I. E.: “Micropipelines”, Communications of the ACM, Vol. 32, pp. 720–738, June 1989.
Shams, M., Ebergen, J.C., Elmasry, M.I.: “Optimizing CMOS Implementations of the CElement”, International Conference on Computer Design 1997, pp. 700–705.
Allier, E., Fesquet, L., Renaudin, M., Sicard, G.: “A 6-bit Low-Power Asynchronous Analog-to-Digital Converter”, Internal Report, ISNR: TIMA-RR-02/03-06-FR, February 2002.
Abrial, A., Bouvier, J., Renaudin, M., Senn, P., Vivet, P.: “A New Contactless Smart Card IC using On-Chip Antenna and Asynchronous Microcontroller”, Journal of Solid-State Circuits, Vol. 36, 2001, pp. 1101–1107.
Renaudin, M., Vivet, P., Robin F.: “ASPRO: an Asynchronous 16-Bit RISC Microprocessor with DSP Capabilities”, ESSCIRC’99, Duisburg, September 21–23, 1999.
Publications of NUHAG (The Numerical Harmonic Analysis Group), University of Vienna, Austria: http://tyche.mat.univie.ac.at/papers/index.html
Fontaine, L., Granjon, Y., Ragot, J., Aliot, E.: “Events Detection in Irregularly Sampled Electrocardiograms”, Proceedings of the World Congress on Medical Physics and Biomedical Engineering at Nice— France, September 14–19 1997, Medical & Biological Engineering & Computing, 1997, vol. 35, supplement part I, p. 436.
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2002 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Allier, E., Fesquet, L., Renaudin, M., Sicard, G. (2002). Low-Power Asynchronous A/D Conversion. In: Hochet, B., Acosta, A.J., Bellido, M.J. (eds) Integrated Circuit Design. Power and Timing Modeling, Optimization and Simulation. PATMOS 2002. Lecture Notes in Computer Science, vol 2451. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-45716-X_9
Download citation
DOI: https://doi.org/10.1007/3-540-45716-X_9
Published:
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-44143-4
Online ISBN: 978-3-540-45716-9
eBook Packages: Springer Book Archive