Abstract
Signal integrity is of primary concern for designs in submicron processes. Based on the characterization of an industrial driver library in terms of crosstalk-induced noise possibility [1], we present a specific test structure to measure crosstalk signal on interconnect lines.An original implementation is proposed for direct amplitude and pulse width measurement of the crosstalk-induced parasitic signal. A validation is given with an HSPICE simulation of the extracted layout of the structure implemented in a 0.25μm process.
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References
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© 2002 Springer-Verlag Berlin Heidelberg
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Picot, F., Coll, P., Auvergne, D. (2002). Crosstalk Measurement Technique for CMOS ICs. In: Hochet, B., Acosta, A.J., Bellido, M.J. (eds) Integrated Circuit Design. Power and Timing Modeling, Optimization and Simulation. PATMOS 2002. Lecture Notes in Computer Science, vol 2451. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-45716-X_7
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DOI: https://doi.org/10.1007/3-540-45716-X_7
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